[Mesa-dev] [PATCH 16/23] radeonsi: set all pipe buffer functions in r600_buffer_common.c

Marek Olšák maraeo at gmail.com
Tue Nov 28 21:38:44 UTC 2017


From: Marek Olšák <marek.olsak at amd.com>

---
 src/gallium/drivers/radeon/r600_buffer_common.c | 48 +++++++++++++++++++------
 src/gallium/drivers/radeon/r600_pipe_common.c   | 19 ----------
 src/gallium/drivers/radeon/r600_pipe_common.h   | 19 +++-------
 src/gallium/drivers/radeonsi/si_pipe.c          |  3 +-
 4 files changed, 44 insertions(+), 45 deletions(-)

diff --git a/src/gallium/drivers/radeon/r600_buffer_common.c b/src/gallium/drivers/radeon/r600_buffer_common.c
index 3e476f7..52b4726 100644
--- a/src/gallium/drivers/radeon/r600_buffer_common.c
+++ b/src/gallium/drivers/radeon/r600_buffer_common.c
@@ -14,20 +14,21 @@
  *
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
 
+#include "../radeonsi/si_pipe.h"
 #include "r600_cs.h"
 #include "util/u_memory.h"
 #include "util/u_upload_mgr.h"
 #include <inttypes.h>
 #include <stdio.h>
 
 bool si_rings_is_buffer_referenced(struct r600_common_context *ctx,
 				   struct pb_buffer *buf,
 				   enum radeon_bo_usage usage)
 {
@@ -303,22 +304,22 @@ void si_replace_buffer_storage(struct pipe_context *ctx,
 
 	assert(rdst->vram_usage == rsrc->vram_usage);
 	assert(rdst->gart_usage == rsrc->gart_usage);
 	assert(rdst->bo_size == rsrc->bo_size);
 	assert(rdst->bo_alignment == rsrc->bo_alignment);
 	assert(rdst->domains == rsrc->domains);
 
 	rctx->rebind_buffer(ctx, dst, old_gpu_address);
 }
 
-void si_invalidate_resource(struct pipe_context *ctx,
-			    struct pipe_resource *resource)
+static void si_invalidate_resource(struct pipe_context *ctx,
+				   struct pipe_resource *resource)
 {
 	struct r600_common_context *rctx = (struct r600_common_context*)ctx;
 	struct r600_resource *rbuffer = r600_resource(resource);
 
 	/* We currently only do anyting here for buffers */
 	if (resource->target == PIPE_BUFFER)
 		(void)r600_invalidate_buffer(rctx, rbuffer);
 }
 
 static void *r600_buffer_get_transfer(struct pipe_context *ctx,
@@ -555,24 +556,24 @@ static void r600_buffer_transfer_unmap(struct pipe_context *ctx,
 
 	r600_resource_reference(&rtransfer->staging, NULL);
 	assert(rtransfer->b.staging == NULL); /* for threaded context only */
 	pipe_resource_reference(&transfer->resource, NULL);
 
 	/* Don't use pool_transfers_unsync. We are always in the driver
 	 * thread. */
 	slab_free(&rctx->pool_transfers, transfer);
 }
 
-void si_buffer_subdata(struct pipe_context *ctx,
-		       struct pipe_resource *buffer,
-		       unsigned usage, unsigned offset,
-		       unsigned size, const void *data)
+static void si_buffer_subdata(struct pipe_context *ctx,
+			      struct pipe_resource *buffer,
+			      unsigned usage, unsigned offset,
+			      unsigned size, const void *data)
 {
 	struct pipe_transfer *transfer = NULL;
 	struct pipe_box box;
 	uint8_t *map = NULL;
 
 	u_box_1d(offset, size, &box);
 	map = r600_buffer_transfer_map(ctx, buffer, 0,
 				       PIPE_TRANSFER_WRITE |
 				       PIPE_TRANSFER_DISCARD_RANGE |
 				       usage,
@@ -609,23 +610,23 @@ r600_alloc_buffer_struct(struct pipe_screen *screen,
 	rbuffer->b.vtbl = &r600_buffer_vtbl;
 	threaded_resource_init(&rbuffer->b.b);
 
 	rbuffer->buf = NULL;
 	rbuffer->bind_history = 0;
 	rbuffer->TC_L2_dirty = false;
 	util_range_init(&rbuffer->valid_buffer_range);
 	return rbuffer;
 }
 
-struct pipe_resource *si_buffer_create(struct pipe_screen *screen,
-				       const struct pipe_resource *templ,
-				       unsigned alignment)
+static struct pipe_resource *si_buffer_create(struct pipe_screen *screen,
+					      const struct pipe_resource *templ,
+					      unsigned alignment)
 {
 	struct r600_common_screen *rscreen = (struct r600_common_screen*)screen;
 	struct r600_resource *rbuffer = r600_alloc_buffer_struct(screen, templ);
 
 	si_init_resource_fields(rscreen, rbuffer, templ->width0, alignment);
 
 	if (templ->flags & PIPE_RESOURCE_FLAG_SPARSE)
 		rbuffer->flags |= RADEON_FLAG_SPARSE;
 
 	if (!si_alloc_resource(rscreen, rbuffer)) {
@@ -649,21 +650,21 @@ struct pipe_resource *si_aligned_buffer_create(struct pipe_screen *screen,
 	buffer.bind = 0;
 	buffer.usage = usage;
 	buffer.flags = flags;
 	buffer.width0 = size;
 	buffer.height0 = 1;
 	buffer.depth0 = 1;
 	buffer.array_size = 1;
 	return si_buffer_create(screen, &buffer, alignment);
 }
 
-struct pipe_resource *
+static struct pipe_resource *
 si_buffer_from_user_memory(struct pipe_screen *screen,
 			   const struct pipe_resource *templ,
 			   void *user_memory)
 {
 	struct r600_common_screen *rscreen = (struct r600_common_screen*)screen;
 	struct radeon_winsys *ws = rscreen->ws;
 	struct r600_resource *rbuffer = r600_alloc_buffer_struct(screen, templ);
 
 	rbuffer->domains = RADEON_DOMAIN_GTT;
 	rbuffer->flags = 0;
@@ -682,10 +683,37 @@ si_buffer_from_user_memory(struct pipe_screen *screen,
 		rbuffer->gpu_address =
 			ws->buffer_get_virtual_address(rbuffer->buf);
 	else
 		rbuffer->gpu_address = 0;
 
 	rbuffer->vram_usage = 0;
 	rbuffer->gart_usage = templ->width0;
 
 	return &rbuffer->b.b;
 }
+
+static struct pipe_resource *si_resource_create(struct pipe_screen *screen,
+						const struct pipe_resource *templ)
+{
+	if (templ->target == PIPE_BUFFER) {
+		return si_buffer_create(screen, templ, 256);
+	} else {
+		return si_texture_create(screen, templ);
+	}
+}
+
+void si_init_screen_buffer_functions(struct si_screen *sscreen)
+{
+	sscreen->b.b.resource_create = si_resource_create;
+	sscreen->b.b.resource_destroy = u_resource_destroy_vtbl;
+	sscreen->b.b.resource_from_user_memory = si_buffer_from_user_memory;
+}
+
+void si_init_buffer_functions(struct si_context *sctx)
+{
+	sctx->b.b.invalidate_resource = si_invalidate_resource;
+	sctx->b.b.transfer_map = u_transfer_map_vtbl;
+	sctx->b.b.transfer_flush_region = u_transfer_flush_region_vtbl;
+	sctx->b.b.transfer_unmap = u_transfer_unmap_vtbl;
+	sctx->b.b.texture_subdata = u_default_texture_subdata;
+	sctx->b.b.buffer_subdata = si_buffer_subdata;
+}
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c
index c912d0b..60e5490 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -407,27 +407,21 @@ bool si_common_context_init(struct r600_common_context *rctx,
 			    unsigned context_flags)
 {
 	slab_create_child(&rctx->pool_transfers, &rscreen->pool_transfers);
 	slab_create_child(&rctx->pool_transfers_unsync, &rscreen->pool_transfers);
 
 	rctx->screen = rscreen;
 	rctx->ws = rscreen->ws;
 	rctx->family = rscreen->family;
 	rctx->chip_class = rscreen->chip_class;
 
-	rctx->b.invalidate_resource = si_invalidate_resource;
 	rctx->b.resource_commit = r600_resource_commit;
-	rctx->b.transfer_map = u_transfer_map_vtbl;
-	rctx->b.transfer_flush_region = u_transfer_flush_region_vtbl;
-	rctx->b.transfer_unmap = u_transfer_unmap_vtbl;
-	rctx->b.texture_subdata = u_default_texture_subdata;
-	rctx->b.buffer_subdata = si_buffer_subdata;
 
 	if (rscreen->info.drm_major == 2 && rscreen->info.drm_minor >= 43) {
 		rctx->b.get_device_reset_status = r600_get_reset_status;
 		rctx->gpu_reset_counter =
 			rctx->ws->query_value(rctx->ws,
 					      RADEON_GPU_RESET_COUNTER);
 	}
 
 	rctx->b.set_device_reset_callback = r600_set_device_reset_callback;
 
@@ -569,36 +563,23 @@ static const struct debug_named_value common_debug_options[] = {
 	{ "nodpbb", DBG(NO_DPBB), "Disable DPBB." },
 	{ "nodfsm", DBG(NO_DFSM), "Disable DFSM." },
 	{ "dpbb", DBG(DPBB), "Enable DPBB." },
 	{ "dfsm", DBG(DFSM), "Enable DFSM." },
 	{ "nooutoforder", DBG(NO_OUT_OF_ORDER), "Disable out-of-order rasterization" },
 	{ "reserve_vmid", DBG(RESERVE_VMID), "Force VMID reservation per context." },
 
 	DEBUG_NAMED_VALUE_END /* must be last */
 };
 
-struct pipe_resource *si_resource_create_common(struct pipe_screen *screen,
-						const struct pipe_resource *templ)
-{
-	if (templ->target == PIPE_BUFFER) {
-		return si_buffer_create(screen, templ, 256);
-	} else {
-		return si_texture_create(screen, templ);
-	}
-}
-
 bool si_common_screen_init(struct r600_common_screen *rscreen,
 			   struct radeon_winsys *ws)
 {
-	rscreen->b.resource_destroy = u_resource_destroy_vtbl;
-	rscreen->b.resource_from_user_memory = si_buffer_from_user_memory;
-
 	si_init_screen_texture_functions(rscreen);
 	si_init_screen_query_functions(rscreen);
 
 	rscreen->debug_flags |= debug_get_flags_option("R600_DEBUG", common_debug_options, 0);
 	rscreen->has_rbplus = false;
 	rscreen->rbplus_allowed = false;
 
 	slab_create_parent(&rscreen->pool_transfers, sizeof(struct r600_transfer), 64);
 
 	rscreen->force_aniso = MIN2(16, debug_get_num_option("R600_TEX_ANISO", -1));
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index 08dffb9..769024e 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -38,20 +38,22 @@
 #include "util/disk_cache.h"
 #include "util/u_blitter.h"
 #include "util/list.h"
 #include "util/u_range.h"
 #include "util/slab.h"
 #include "util/u_suballoc.h"
 #include "util/u_transfer.h"
 #include "util/u_threaded_context.h"
 
 struct u_log_context;
+struct si_screen;
+struct si_context;
 
 #define R600_RESOURCE_FLAG_TRANSFER		(PIPE_RESOURCE_FLAG_DRV_PRIV << 0)
 #define R600_RESOURCE_FLAG_FLUSHED_DEPTH	(PIPE_RESOURCE_FLAG_DRV_PRIV << 1)
 #define R600_RESOURCE_FLAG_FORCE_TILING		(PIPE_RESOURCE_FLAG_DRV_PRIV << 2)
 #define R600_RESOURCE_FLAG_DISABLE_DCC		(PIPE_RESOURCE_FLAG_DRV_PRIV << 3)
 #define R600_RESOURCE_FLAG_UNMAPPABLE		(PIPE_RESOURCE_FLAG_DRV_PRIV << 4)
 
 /* Debug flags. */
 enum {
 	/* Shader logging options: */
@@ -605,46 +607,35 @@ struct r600_common_context {
 				enum ring_type ring);
 };
 
 /* r600_buffer_common.c */
 bool si_rings_is_buffer_referenced(struct r600_common_context *ctx,
 				   struct pb_buffer *buf,
 				   enum radeon_bo_usage usage);
 void *si_buffer_map_sync_with_rings(struct r600_common_context *ctx,
 				    struct r600_resource *resource,
 				    unsigned usage);
-void si_buffer_subdata(struct pipe_context *ctx,
-		       struct pipe_resource *buffer,
-		       unsigned usage, unsigned offset,
-		       unsigned size, const void *data);
 void si_init_resource_fields(struct r600_common_screen *rscreen,
 			     struct r600_resource *res,
 			     uint64_t size, unsigned alignment);
 bool si_alloc_resource(struct r600_common_screen *rscreen,
 		       struct r600_resource *res);
-struct pipe_resource *si_buffer_create(struct pipe_screen *screen,
-				       const struct pipe_resource *templ,
-				       unsigned alignment);
 struct pipe_resource *si_aligned_buffer_create(struct pipe_screen *screen,
 					       unsigned flags,
 					       unsigned usage,
 					       unsigned size,
 					       unsigned alignment);
-struct pipe_resource *
-si_buffer_from_user_memory(struct pipe_screen *screen,
-			   const struct pipe_resource *templ,
-			   void *user_memory);
-void si_invalidate_resource(struct pipe_context *ctx,
-			    struct pipe_resource *resource);
 void si_replace_buffer_storage(struct pipe_context *ctx,
 			       struct pipe_resource *dst,
 			       struct pipe_resource *src);
+void si_init_screen_buffer_functions(struct si_screen *sscreen);
+void si_init_buffer_functions(struct si_context *sctx);
 
 /* r600_common_pipe.c */
 void si_gfx_write_event_eop(struct r600_common_context *ctx,
 			    unsigned event, unsigned event_flags,
 			    unsigned data_sel,
 			    struct r600_resource *buf, uint64_t va,
 			    uint32_t new_fence, unsigned query_type);
 unsigned si_gfx_write_fence_dwords(struct r600_common_screen *screen);
 void si_gfx_wait_fence(struct r600_common_context *ctx,
 		       uint64_t va, uint32_t ref, uint32_t mask);
@@ -654,22 +645,20 @@ void si_destroy_common_screen(struct r600_common_screen *rscreen);
 bool si_common_context_init(struct r600_common_context *rctx,
 			    struct r600_common_screen *rscreen,
 			    unsigned context_flags);
 void si_common_context_cleanup(struct r600_common_context *rctx);
 bool si_can_dump_shader(struct r600_common_screen *rscreen,
 			unsigned processor);
 bool si_extra_shader_checks(struct r600_common_screen *rscreen,
 			    unsigned processor);
 void si_screen_clear_buffer(struct r600_common_screen *rscreen, struct pipe_resource *dst,
 			    uint64_t offset, uint64_t size, unsigned value);
-struct pipe_resource *si_resource_create_common(struct pipe_screen *screen,
-						const struct pipe_resource *templ);
 void si_need_dma_space(struct r600_common_context *ctx, unsigned num_dw,
 		       struct r600_resource *dst, struct r600_resource *src);
 void si_save_cs(struct radeon_winsys *ws, struct radeon_winsys_cs *cs,
 		struct radeon_saved_cs *saved, bool get_buffer_list);
 void si_clear_saved_cs(struct radeon_saved_cs *saved);
 bool si_check_device_reset(struct r600_common_context *rctx);
 
 /* r600_gpu_load.c */
 void si_gpu_load_kill_thread(struct r600_common_screen *rscreen);
 uint64_t si_begin_counter(struct r600_common_screen *rscreen, unsigned type);
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index fd09d78..af521a2 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -200,20 +200,21 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen,
 	sctx->b.set_atom_dirty = (void *)si_set_atom_dirty;
 	sctx->screen = sscreen; /* Easy accessing of screen/winsys. */
 	sctx->is_debug = (flags & PIPE_CONTEXT_DEBUG) != 0;
 
 	if (!si_common_context_init(&sctx->b, &sscreen->b, flags))
 		goto fail;
 
 	if (sscreen->b.info.drm_major == 3)
 		sctx->b.b.get_device_reset_status = si_amdgpu_get_reset_status;
 
+	si_init_buffer_functions(sctx);
 	si_init_clear_functions(sctx);
 	si_init_blit_functions(sctx);
 	si_init_compute_functions(sctx);
 	si_init_cp_dma_functions(sctx);
 	si_init_debug_functions(sctx);
 	si_init_msaa_functions(sctx);
 	si_init_streamout_functions(sctx);
 
 	if (sscreen->b.info.has_hw_decode) {
 		sctx->b.b.create_video_codec = si_uvd_create_decoder;
@@ -591,23 +592,23 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws,
 
 	sscreen->b.ws = ws;
 	ws->query_info(ws, &sscreen->b.info);
 
 	sscreen->b.family = sscreen->b.info.family;
 	sscreen->b.chip_class = sscreen->b.info.chip_class;
 
 	/* Set functions first. */
 	sscreen->b.b.context_create = si_pipe_create_context;
 	sscreen->b.b.destroy = si_destroy_screen;
-	sscreen->b.b.resource_create = si_resource_create_common;
 
 	si_init_screen_get_functions(sscreen);
+	si_init_screen_buffer_functions(sscreen);
 	si_init_screen_fence_functions(sscreen);
 	si_init_screen_state_functions(sscreen);
 
 	/* Set these flags in debug_flags early, so that the shader cache takes
 	 * them into account.
 	 */
 	if (driQueryOptionb(config->options,
 			    "glsl_correct_derivatives_after_discard"))
 		sscreen->b.debug_flags |= DBG(FS_CORRECT_DERIVS_AFTER_KILL);
 	if (driQueryOptionb(config->options, "radeonsi_enable_sisched"))
-- 
2.7.4



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