[Mesa-dev] [PATCH 13/23] radeonsi: remove more functions from r600_pipe_common.c
Marek Olšák
maraeo at gmail.com
Tue Nov 28 21:38:41 UTC 2017
From: Marek Olšák <marek.olsak at amd.com>
---
src/gallium/drivers/radeon/r600_pipe_common.c | 31 ---------------------------
src/gallium/drivers/radeon/r600_pipe_common.h | 2 --
src/gallium/drivers/radeonsi/si_hw_context.c | 6 ++++--
3 files changed, 4 insertions(+), 35 deletions(-)
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c
index a72d2d4..dc776a2 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -16,35 +16,23 @@
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
#include "r600_pipe_common.h"
#include "r600_cs.h"
-#include "tgsi/tgsi_parse.h"
-#include "util/list.h"
-#include "util/u_draw_quad.h"
#include "util/u_memory.h"
-#include "util/u_format_s3tc.h"
#include "util/u_upload_mgr.h"
-#include "util/os_time.h"
-#include "vl/vl_decoder.h"
-#include "vl/vl_video_buffer.h"
#include "radeon/radeon_video.h"
-#include "amd/common/ac_llvm_util.h"
-#include "amd/common/sid.h"
-#include <inttypes.h>
-
-#include <llvm-c/TargetMachine.h>
/*
* pipe_context
*/
/**
* Write an EOP event.
*
* \param event EVENT_TYPE_*
* \param event_flags Optional cache flush flags (TC)
@@ -245,38 +233,20 @@ void si_need_dma_space(struct r600_common_context *ctx, unsigned num_dw,
if (src)
radeon_add_to_buffer_list(ctx, &ctx->dma, src,
RADEON_USAGE_READ,
RADEON_PRIO_SDMA_BUFFER);
}
/* this function is called before all DMA calls, so increment this. */
ctx->num_dma_calls++;
}
-static void r600_memory_barrier(struct pipe_context *ctx, unsigned flags)
-{
-}
-
-void si_preflush_suspend_features(struct r600_common_context *ctx)
-{
- /* suspend queries */
- if (!LIST_IS_EMPTY(&ctx->active_queries))
- si_suspend_queries(ctx);
-}
-
-void si_postflush_resume_features(struct r600_common_context *ctx)
-{
- /* resume queries */
- if (!LIST_IS_EMPTY(&ctx->active_queries))
- si_resume_queries(ctx);
-}
-
static void r600_flush_dma_ring(void *ctx, unsigned flags,
struct pipe_fence_handle **fence)
{
struct r600_common_context *rctx = (struct r600_common_context *)ctx;
struct radeon_winsys_cs *cs = rctx->dma.cs;
struct radeon_saved_cs saved;
bool check_vm =
(rctx->screen->debug_flags & DBG(CHECK_VM)) &&
rctx->check_vm_faults;
@@ -443,21 +413,20 @@ bool si_common_context_init(struct r600_common_context *rctx,
rctx->ws = rscreen->ws;
rctx->family = rscreen->family;
rctx->chip_class = rscreen->chip_class;
rctx->b.invalidate_resource = si_invalidate_resource;
rctx->b.resource_commit = r600_resource_commit;
rctx->b.transfer_map = u_transfer_map_vtbl;
rctx->b.transfer_flush_region = u_transfer_flush_region_vtbl;
rctx->b.transfer_unmap = u_transfer_unmap_vtbl;
rctx->b.texture_subdata = u_default_texture_subdata;
- rctx->b.memory_barrier = r600_memory_barrier;
rctx->b.buffer_subdata = si_buffer_subdata;
if (rscreen->info.drm_major == 2 && rscreen->info.drm_minor >= 43) {
rctx->b.get_device_reset_status = r600_get_reset_status;
rctx->gpu_reset_counter =
rctx->ws->query_value(rctx->ws,
RADEON_GPU_RESET_COUNTER);
}
rctx->b.set_device_reset_callback = r600_set_device_reset_callback;
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index 0597af4..08dffb9 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -644,22 +644,20 @@ void si_gfx_write_event_eop(struct r600_common_context *ctx,
unsigned event, unsigned event_flags,
unsigned data_sel,
struct r600_resource *buf, uint64_t va,
uint32_t new_fence, unsigned query_type);
unsigned si_gfx_write_fence_dwords(struct r600_common_screen *screen);
void si_gfx_wait_fence(struct r600_common_context *ctx,
uint64_t va, uint32_t ref, uint32_t mask);
bool si_common_screen_init(struct r600_common_screen *rscreen,
struct radeon_winsys *ws);
void si_destroy_common_screen(struct r600_common_screen *rscreen);
-void si_preflush_suspend_features(struct r600_common_context *ctx);
-void si_postflush_resume_features(struct r600_common_context *ctx);
bool si_common_context_init(struct r600_common_context *rctx,
struct r600_common_screen *rscreen,
unsigned context_flags);
void si_common_context_cleanup(struct r600_common_context *rctx);
bool si_can_dump_shader(struct r600_common_screen *rscreen,
unsigned processor);
bool si_extra_shader_checks(struct r600_common_screen *rscreen,
unsigned processor);
void si_screen_clear_buffer(struct r600_common_screen *rscreen, struct pipe_resource *dst,
uint64_t offset, uint64_t size, unsigned value);
diff --git a/src/gallium/drivers/radeonsi/si_hw_context.c b/src/gallium/drivers/radeonsi/si_hw_context.c
index f163e50..4e94c47 100644
--- a/src/gallium/drivers/radeonsi/si_hw_context.c
+++ b/src/gallium/drivers/radeonsi/si_hw_context.c
@@ -90,21 +90,22 @@ void si_context_gfx_flush(void *context, unsigned flags,
* This code is only needed when the driver flushes the GFX IB
* internally, and it never asks for a fence handle.
*/
if (radeon_emitted(ctx->b.dma.cs, 0)) {
assert(fence == NULL); /* internal flushes only */
ctx->b.dma.flush(ctx, flags, NULL);
}
ctx->gfx_flush_in_progress = true;
- si_preflush_suspend_features(&ctx->b);
+ if (!LIST_IS_EMPTY(&ctx->b.active_queries))
+ si_suspend_queries(&ctx->b);
ctx->streamout.suspended = false;
if (ctx->streamout.begin_emitted) {
si_emit_streamout_end(ctx);
ctx->streamout.suspended = true;
}
ctx->b.flags |= SI_CONTEXT_CS_PARTIAL_FLUSH |
SI_CONTEXT_PS_PARTIAL_FLUSH;
@@ -267,21 +268,22 @@ void si_begin_new_cs(struct si_context *ctx)
if (ctx->scratch_buffer) {
si_context_add_resource_size(&ctx->b.b,
&ctx->scratch_buffer->b.b);
}
if (ctx->streamout.suspended) {
ctx->streamout.append_bitmask = ctx->streamout.enabled_mask;
si_streamout_buffers_dirty(ctx);
}
- si_postflush_resume_features(&ctx->b);
+ if (!LIST_IS_EMPTY(&ctx->b.active_queries))
+ si_resume_queries(&ctx->b);
assert(!ctx->b.gfx.cs->prev_dw);
ctx->b.initial_gfx_cs_size = ctx->b.gfx.cs->current.cdw;
/* Invalidate various draw states so that they are emitted before
* the first draw call. */
si_invalidate_draw_sh_constants(ctx);
ctx->last_index_size = -1;
ctx->last_primitive_restart_en = -1;
ctx->last_restart_index = SI_RESTART_INDEX_UNKNOWN;
--
2.7.4
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