[Mesa-dev] [PATCH 1/6] i965/miptree: Add a helper for getting the textureable format

[Jason Ekstrand]

---
 src/mesa/drivers/dri/i965/brw_draw.c             |  3 ++-
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 10 ++++++----
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c    | 13 +++++++++++++
 src/mesa/drivers/dri/i965/intel_mipmap_tree.h    |  6 ++++++
 4 files changed, 27 insertions(+), 5 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c
index 7e29dcf..ac8a2c1 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -397,7 +397,8 @@ brw_predraw_resolve_inputs(struct brw_context *brw, bool rendering)
 
       struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, i);
       enum isl_format view_format =
-         translate_tex_format(brw, tex_obj->_Format, sampler->sRGBDecode);
+         intel_miptree_texture_format(brw, tex_obj->mt, tex_obj->_Format,
+                                      sampler->sRGBDecode);
 
       unsigned min_level, min_layer, num_levels, num_layers;
       if (tex_obj->base.Immutable) {
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index adf60a8..10d7ade 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -507,10 +507,12 @@ brw_update_texture_surface(struct gl_context *ctx,
       const unsigned swizzle = (unlikely(alpha_depth) ? SWIZZLE_XYZW :
                                 brw_get_texture_swizzle(&brw->ctx, obj));
 
-      mesa_format mesa_fmt = plane == 0 ? intel_obj->_Format : mt->format;
-      enum isl_format format = translate_tex_format(brw, mesa_fmt,
-                                                    for_txf ? GL_DECODE_EXT :
-                                                    sampler->sRGBDecode);
+      enum isl_format format =
+         intel_miptree_texture_format(brw, mt,
+                                      plane == 0 ? intel_obj->_Format :
+                                                   MESA_FORMAT_NONE,
+                                      for_txf ? GL_DECODE_EXT :
+                                                sampler->sRGBDecode);
 
       /* Implement gen6 and gen7 gather work-around */
       bool need_green_to_blue = false;
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index b87d356..024ce3e 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -2578,6 +2578,19 @@ can_texture_with_ccs(struct brw_context *brw,
    return true;
 }
 
+enum isl_format
+intel_miptree_texture_format(struct brw_context *brw,
+                             struct intel_mipmap_tree *mt,
+                             mesa_format view_format,
+		             GLenum srgb_decode)
+{
+   mesa_format format = view_format;
+   if (format == MESA_FORMAT_NONE)
+      format = mt->format;
+
+   return translate_tex_format(brw, format, srgb_decode);
+}
+
 enum isl_aux_usage
 intel_miptree_texture_aux_usage(struct brw_context *brw,
                                 struct intel_mipmap_tree *mt,
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
index 5b7d7ef..23eb23e 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
@@ -632,6 +632,12 @@ intel_miptree_access_raw(struct brw_context *brw,
       intel_miptree_finish_write(brw, mt, level, layer, 1, false);
 }
 
+enum isl_format
+intel_miptree_texture_format(struct brw_context *brw,
+                             struct intel_mipmap_tree *mt,
+                             mesa_format view_format,
+		             GLenum srgb_decode);
+
 enum isl_aux_usage
 intel_miptree_texture_aux_usage(struct brw_context *brw,
                                 struct intel_mipmap_tree *mt,
-- 
2.5.0.400.gff86faf