[Mesa-dev] [PATCH 2/2] freedreno: use u_transfer helper
Rob Clark
robdclark at gmail.com
Wed Nov 29 13:48:31 UTC 2017
Also removes usage of u_resource, which was basically useless for
freedreno. Perhaps that should be two commits, but that would have
required undoing and then re-doing &rsc->base.b stuff.
Signed-off-by: Rob Clark <robdclark at gmail.com>
---
src/gallium/drivers/freedreno/a3xx/fd3_emit.c | 8 +-
src/gallium/drivers/freedreno/a3xx/fd3_gmem.c | 15 +-
src/gallium/drivers/freedreno/a4xx/fd4_emit.c | 6 +-
src/gallium/drivers/freedreno/a4xx/fd4_gmem.c | 17 +-
src/gallium/drivers/freedreno/a4xx/fd4_texture.c | 2 +-
src/gallium/drivers/freedreno/a5xx/fd5_emit.c | 2 +-
src/gallium/drivers/freedreno/a5xx/fd5_gmem.c | 19 +-
src/gallium/drivers/freedreno/a5xx/fd5_texture.c | 2 +-
src/gallium/drivers/freedreno/freedreno_batch.c | 4 +-
src/gallium/drivers/freedreno/freedreno_gmem.c | 4 +-
src/gallium/drivers/freedreno/freedreno_resource.c | 261 ++-------------------
src/gallium/drivers/freedreno/freedreno_resource.h | 12 +-
12 files changed, 67 insertions(+), 285 deletions(-)
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
index aefbbea4a7c..f1577de08d8 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
@@ -306,8 +306,8 @@ fd3_emit_gmem_restore_tex(struct fd_ringbuffer *ring,
/* The restore blit_zs shader expects stencil in sampler 0, and depth
* in sampler 1
*/
- if (rsc->stencil && i == 0) {
- rsc = rsc->stencil;
+ if (rsc->base.stencil && i == 0) {
+ rsc = fd_resource(rsc->base.stencil);
format = fd_gmem_restore_format(rsc->base.b.format);
}
@@ -341,8 +341,8 @@ fd3_emit_gmem_restore_tex(struct fd_ringbuffer *ring,
if (psurf[i]) {
struct fd_resource *rsc = fd_resource(psurf[i]->texture);
/* Matches above logic for blit_zs shader */
- if (rsc->stencil && i == 0)
- rsc = rsc->stencil;
+ if (rsc->base.stencil && i == 0)
+ rsc = fd_resource(rsc->base.stencil);
unsigned lvl = psurf[i]->u.tex.level;
uint32_t offset = fd_resource_offset(rsc, lvl, psurf[i]->u.tex.first_layer);
OUT_RELOC(ring, rsc->bo, offset, 0, 0);
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c b/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
index 4bbbcf90ffa..c12eaf3bb3e 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
@@ -76,8 +76,8 @@ emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs,
/* In case we're drawing to Z32F_S8, the "color" actually goes to
* the stencil
*/
- if (rsc->stencil) {
- rsc = rsc->stencil;
+ if (rsc->base.stencil) {
+ rsc = fd_resource(rsc->base.stencil);
pformat = rsc->base.b.format;
if (bases)
bases++;
@@ -323,7 +323,7 @@ emit_gmem2mem_surf(struct fd_batch *batch,
struct fd_resource *rsc = fd_resource(psurf->texture);
enum pipe_format format = psurf->format;
if (stencil) {
- rsc = rsc->stencil;
+ rsc = fd_resource(rsc->base.stencil);
format = rsc->base.b.format;
}
struct fd_resource_slice *slice = fd_resource_slice(rsc, psurf->u.tex.level);
@@ -445,10 +445,10 @@ fd3_emit_tile_gmem2mem(struct fd_batch *batch, struct fd_tile *tile)
if (batch->resolve & (FD_BUFFER_DEPTH | FD_BUFFER_STENCIL)) {
struct fd_resource *rsc = fd_resource(pfb->zsbuf->texture);
- if (!rsc->stencil || batch->resolve & FD_BUFFER_DEPTH)
+ if (!rsc->base.stencil || batch->resolve & FD_BUFFER_DEPTH)
emit_gmem2mem_surf(batch, RB_COPY_DEPTH_STENCIL, false,
ctx->gmem.zsbuf_base[0], pfb->zsbuf);
- if (rsc->stencil && batch->resolve & FD_BUFFER_STENCIL)
+ if (rsc->base.stencil && batch->resolve & FD_BUFFER_STENCIL)
emit_gmem2mem_surf(batch, RB_COPY_DEPTH_STENCIL, true,
ctx->gmem.zsbuf_base[1], pfb->zsbuf);
}
@@ -1001,10 +1001,11 @@ fd3_emit_tile_renderprep(struct fd_batch *batch, struct fd_tile *tile)
if (pfb->zsbuf) {
struct fd_resource *rsc = fd_resource(pfb->zsbuf->texture);
OUT_RING(ring, A3XX_RB_DEPTH_PITCH(rsc->cpp * gmem->bin_w));
- if (rsc->stencil) {
+ if (rsc->base.stencil) {
+ struct fd_resource *stencil = fd_resource(rsc->base.stencil);
OUT_PKT0(ring, REG_A3XX_RB_STENCIL_INFO, 2);
OUT_RING(ring, A3XX_RB_STENCIL_INFO_STENCIL_BASE(gmem->zsbuf_base[1]));
- OUT_RING(ring, A3XX_RB_STENCIL_PITCH(rsc->stencil->cpp * gmem->bin_w));
+ OUT_RING(ring, A3XX_RB_STENCIL_PITCH(stencil->cpp * gmem->bin_w));
}
} else {
OUT_RING(ring, 0x00000000);
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
index 8262b45daad..e17d861ad3f 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
@@ -191,7 +191,7 @@ emit_textures(struct fd_context *ctx, struct fd_ringbuffer *ring,
if (view->base.texture) {
struct fd_resource *rsc = fd_resource(view->base.texture);
if (view->base.format == PIPE_FORMAT_X32_S8X24_UINT)
- rsc = rsc->stencil;
+ rsc = fd_resource(rsc->base.stencil);
OUT_RELOC(ring, rsc->bo, view->offset, view->texconst4, 0);
} else {
OUT_RING(ring, 0x00000000);
@@ -296,8 +296,8 @@ fd4_emit_gmem_restore_tex(struct fd_ringbuffer *ring, unsigned nr_bufs,
/* The restore blit_zs shader expects stencil in sampler 0,
* and depth in sampler 1
*/
- if (rsc->stencil && (i == 0)) {
- rsc = rsc->stencil;
+ if (rsc->base.stencil && (i == 0)) {
+ rsc = fd_resource(rsc->base.stencil);
format = fd_gmem_restore_format(rsc->base.b.format);
}
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c b/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c
index ebfbcabf67d..e0d7c08d094 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c
@@ -77,8 +77,8 @@ emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs,
/* In case we're drawing to Z32F_S8, the "color" actually goes to
* the stencil
*/
- if (rsc->stencil) {
- rsc = rsc->stencil;
+ if (rsc->base.stencil) {
+ rsc = fd_resource(rsc->base.stencil);
pformat = rsc->base.b.format;
if (bases)
bases++;
@@ -158,8 +158,8 @@ emit_gmem2mem_surf(struct fd_batch *batch, bool stencil,
uint32_t offset;
if (stencil) {
- debug_assert(rsc->stencil);
- rsc = rsc->stencil;
+ debug_assert(rsc->base.stencil);
+ rsc = fd_resource(rsc->base.stencil);
pformat = rsc->base.b.format;
}
@@ -272,9 +272,9 @@ fd4_emit_tile_gmem2mem(struct fd_batch *batch, struct fd_tile *tile)
if (batch->resolve & (FD_BUFFER_DEPTH | FD_BUFFER_STENCIL)) {
struct fd_resource *rsc = fd_resource(pfb->zsbuf->texture);
- if (!rsc->stencil || (batch->resolve & FD_BUFFER_DEPTH))
+ if (!rsc->base.stencil || (batch->resolve & FD_BUFFER_DEPTH))
emit_gmem2mem_surf(batch, false, ctx->gmem.zsbuf_base[0], pfb->zsbuf);
- if (rsc->stencil && (batch->resolve & FD_BUFFER_STENCIL))
+ if (rsc->base.stencil && (batch->resolve & FD_BUFFER_STENCIL))
emit_gmem2mem_surf(batch, true, ctx->gmem.zsbuf_base[1], pfb->zsbuf);
}
@@ -723,10 +723,11 @@ fd4_emit_tile_prep(struct fd_batch *batch, struct fd_tile *tile)
OUT_RING(ring, A4XX_RB_DEPTH_PITCH2(cpp * gmem->bin_w));
OUT_PKT0(ring, REG_A4XX_RB_STENCIL_INFO, 2);
- if (rsc->stencil) {
+ if (rsc->base.stencil) {
+ struct fd_resource *stencil = fd_resource(rsc->base.stencil);
OUT_RING(ring, A4XX_RB_STENCIL_INFO_SEPARATE_STENCIL |
A4XX_RB_STENCIL_INFO_STENCIL_BASE(gmem->zsbuf_base[1]));
- OUT_RING(ring, A4XX_RB_STENCIL_PITCH(rsc->stencil->cpp * gmem->bin_w));
+ OUT_RING(ring, A4XX_RB_STENCIL_PITCH(stencil->cpp * gmem->bin_w));
} else {
OUT_RING(ring, 0x00000000);
OUT_RING(ring, 0x00000000);
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_texture.c b/src/gallium/drivers/freedreno/a4xx/fd4_texture.c
index 4b2ca463458..544c417f281 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_texture.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_texture.c
@@ -232,7 +232,7 @@ fd4_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc,
return NULL;
if (format == PIPE_FORMAT_X32_S8X24_UINT) {
- rsc = rsc->stencil;
+ rsc = fd_resource(rsc->base.stencil);
format = rsc->base.b.format;
}
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_emit.c b/src/gallium/drivers/freedreno/a5xx/fd5_emit.c
index 58c837cfd17..6cf9ee1196f 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_emit.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_emit.c
@@ -345,7 +345,7 @@ emit_textures(struct fd_context *ctx, struct fd_ringbuffer *ring,
if (view->base.texture) {
struct fd_resource *rsc = fd_resource(view->base.texture);
if (view->base.format == PIPE_FORMAT_X32_S8X24_UINT)
- rsc = rsc->stencil;
+ rsc = fd_resource(rsc->base.stencil);
OUT_RELOC(ring, rsc->bo, view->offset,
(uint64_t)view->texconst5 << 32, 0);
} else {
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c b/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c
index 7b655954742..ce8bcb86816 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c
@@ -184,12 +184,13 @@ emit_zs(struct fd_ringbuffer *ring, struct pipe_surface *zsbuf,
OUT_RING(ring, 0x00000000);
}
- if (rsc->stencil) {
+ if (rsc->base.stencil) {
+ struct fd_resource *stencil = fd_resource(rsc->base.stencil);
if (gmem) {
stride = 1 * gmem->bin_w;
size = stride * gmem->bin_h;
} else {
- struct fd_resource_slice *slice = fd_resource_slice(rsc->stencil, 0);
+ struct fd_resource_slice *slice = fd_resource_slice(stencil, 0);
stride = slice->pitch * rsc->cpp;
size = slice->size0;
}
@@ -200,7 +201,7 @@ emit_zs(struct fd_ringbuffer *ring, struct pipe_surface *zsbuf,
OUT_RING(ring, gmem->zsbuf_base[1]); /* RB_STENCIL_BASE_LO */
OUT_RING(ring, 0x00000000); /* RB_STENCIL_BASE_HI */
} else {
- OUT_RELOCW(ring, rsc->stencil->bo, 0, 0, 0); /* RB_STENCIL_BASE_LO/HI */
+ OUT_RELOCW(ring, stencil->bo, 0, 0, 0); /* RB_STENCIL_BASE_LO/HI */
}
OUT_RING(ring, A5XX_RB_STENCIL_PITCH(stride));
OUT_RING(ring, A5XX_RB_STENCIL_ARRAY_PITCH(size));
@@ -474,7 +475,7 @@ emit_mem2gmem_surf(struct fd_batch *batch, uint32_t base,
debug_assert(psurf->u.tex.first_layer == psurf->u.tex.last_layer);
if (buf == BLIT_S)
- rsc = rsc->stencil;
+ rsc = fd_resource(rsc->base.stencil);
if ((buf == BLIT_ZS) || (buf == BLIT_S)) {
// XXX hack import via BLIT_MRT0 instead of BLIT_ZS, since I don't
@@ -554,9 +555,9 @@ fd5_emit_tile_mem2gmem(struct fd_batch *batch, struct fd_tile *tile)
if (fd_gmem_needs_restore(batch, tile, FD_BUFFER_DEPTH | FD_BUFFER_STENCIL)) {
struct fd_resource *rsc = fd_resource(pfb->zsbuf->texture);
- if (!rsc->stencil || fd_gmem_needs_restore(batch, tile, FD_BUFFER_DEPTH))
+ if (!rsc->base.stencil || fd_gmem_needs_restore(batch, tile, FD_BUFFER_DEPTH))
emit_mem2gmem_surf(batch, gmem->zsbuf_base[0], pfb->zsbuf, BLIT_ZS);
- if (rsc->stencil && fd_gmem_needs_restore(batch, tile, FD_BUFFER_STENCIL))
+ if (rsc->base.stencil && fd_gmem_needs_restore(batch, tile, FD_BUFFER_STENCIL))
emit_mem2gmem_surf(batch, gmem->zsbuf_base[1], pfb->zsbuf, BLIT_S);
}
}
@@ -609,7 +610,7 @@ emit_gmem2mem_surf(struct fd_batch *batch, uint32_t base,
uint32_t offset;
if (buf == BLIT_S)
- rsc = rsc->stencil;
+ rsc = fd_resource(rsc->base.stencil);
slice = fd_resource_slice(rsc, psurf->u.tex.level);
offset = fd_resource_offset(rsc, psurf->u.tex.level,
@@ -645,9 +646,9 @@ fd5_emit_tile_gmem2mem(struct fd_batch *batch, struct fd_tile *tile)
if (batch->resolve & (FD_BUFFER_DEPTH | FD_BUFFER_STENCIL)) {
struct fd_resource *rsc = fd_resource(pfb->zsbuf->texture);
- if (!rsc->stencil || (batch->resolve & FD_BUFFER_DEPTH))
+ if (!rsc->base.stencil || (batch->resolve & FD_BUFFER_DEPTH))
emit_gmem2mem_surf(batch, gmem->zsbuf_base[0], pfb->zsbuf, BLIT_ZS);
- if (rsc->stencil && (batch->resolve & FD_BUFFER_STENCIL))
+ if (rsc->base.stencil && (batch->resolve & FD_BUFFER_STENCIL))
emit_gmem2mem_surf(batch, gmem->zsbuf_base[1], pfb->zsbuf, BLIT_S);
}
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_texture.c b/src/gallium/drivers/freedreno/a5xx/fd5_texture.c
index da35f2a796a..61233550885 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_texture.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_texture.c
@@ -205,7 +205,7 @@ fd5_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc,
return NULL;
if (format == PIPE_FORMAT_X32_S8X24_UINT) {
- rsc = rsc->stencil;
+ rsc = fd_resource(rsc->base.stencil);
format = rsc->base.b.format;
}
diff --git a/src/gallium/drivers/freedreno/freedreno_batch.c b/src/gallium/drivers/freedreno/freedreno_batch.c
index 8f0f78861cf..dc59e3c2390 100644
--- a/src/gallium/drivers/freedreno/freedreno_batch.c
+++ b/src/gallium/drivers/freedreno/freedreno_batch.c
@@ -357,8 +357,8 @@ fd_batch_resource_used(struct fd_batch *batch, struct fd_resource *rsc, bool wri
{
pipe_mutex_assert_locked(batch->ctx->screen->lock);
- if (rsc->stencil)
- fd_batch_resource_used(batch, rsc->stencil, write);
+ if (rsc->base.stencil)
+ fd_batch_resource_used(batch, fd_resource(rsc->base.stencil), write);
DBG("%p: %s %p", batch, write ? "write" : "read", rsc);
diff --git a/src/gallium/drivers/freedreno/freedreno_gmem.c b/src/gallium/drivers/freedreno/freedreno_gmem.c
index fef76733abf..935a8266317 100644
--- a/src/gallium/drivers/freedreno/freedreno_gmem.c
+++ b/src/gallium/drivers/freedreno/freedreno_gmem.c
@@ -127,8 +127,8 @@ calculate_tiles(struct fd_batch *batch)
if (has_zs) {
struct fd_resource *rsc = fd_resource(pfb->zsbuf->texture);
zsbuf_cpp[0] = rsc->cpp;
- if (rsc->stencil)
- zsbuf_cpp[1] = rsc->stencil->cpp;
+ if (rsc->base.stencil)
+ zsbuf_cpp[1] = fd_resource(rsc->base.stencil)->cpp;
}
for (i = 0; i < pfb->nr_cbufs; i++) {
if (pfb->cbufs[i])
diff --git a/src/gallium/drivers/freedreno/freedreno_resource.c b/src/gallium/drivers/freedreno/freedreno_resource.c
index 880666d3af5..d9e41875332 100644
--- a/src/gallium/drivers/freedreno/freedreno_resource.c
+++ b/src/gallium/drivers/freedreno/freedreno_resource.c
@@ -299,114 +299,16 @@ fd_resource_layer_offset(struct fd_resource *rsc,
return layer * slice->size0;
}
-static void
-fd_resource_flush_z32s8(struct fd_transfer *trans, const struct pipe_box *box)
-{
- struct fd_resource *rsc = fd_resource(trans->base.resource);
- struct fd_resource_slice *slice = fd_resource_slice(rsc, trans->base.level);
- struct fd_resource_slice *sslice = fd_resource_slice(rsc->stencil, trans->base.level);
- enum pipe_format format = trans->base.resource->format;
-
- float *depth = fd_bo_map(rsc->bo) + slice->offset +
- fd_resource_layer_offset(rsc, slice, trans->base.box.z) +
- (trans->base.box.y + box->y) * slice->pitch * 4 + (trans->base.box.x + box->x) * 4;
- uint8_t *stencil = fd_bo_map(rsc->stencil->bo) + sslice->offset +
- fd_resource_layer_offset(rsc->stencil, sslice, trans->base.box.z) +
- (trans->base.box.y + box->y) * sslice->pitch + trans->base.box.x + box->x;
-
- if (format != PIPE_FORMAT_X32_S8X24_UINT)
- util_format_z32_float_s8x24_uint_unpack_z_float(
- depth, slice->pitch * 4,
- trans->staging, trans->base.stride,
- box->width, box->height);
-
- util_format_z32_float_s8x24_uint_unpack_s_8uint(
- stencil, sslice->pitch,
- trans->staging, trans->base.stride,
- box->width, box->height);
-}
-
-static void
-fd_resource_flush_rgtc(struct fd_transfer *trans, const struct pipe_box *box)
-{
- struct fd_resource *rsc = fd_resource(trans->base.resource);
- struct fd_resource_slice *slice = fd_resource_slice(rsc, trans->base.level);
- enum pipe_format format = trans->base.resource->format;
-
- uint8_t *data = fd_bo_map(rsc->bo) + slice->offset +
- fd_resource_layer_offset(rsc, slice, trans->base.box.z) +
- ((trans->base.box.y + box->y) * slice->pitch +
- trans->base.box.x + box->x) * rsc->cpp;
-
- uint8_t *source = trans->staging +
- util_format_get_nblocksy(format, box->y) * trans->base.stride +
- util_format_get_stride(format, box->x);
-
- switch (format) {
- case PIPE_FORMAT_RGTC1_UNORM:
- case PIPE_FORMAT_RGTC1_SNORM:
- case PIPE_FORMAT_LATC1_UNORM:
- case PIPE_FORMAT_LATC1_SNORM:
- util_format_rgtc1_unorm_unpack_rgba_8unorm(
- data, slice->pitch * rsc->cpp,
- source, trans->base.stride,
- box->width, box->height);
- break;
- case PIPE_FORMAT_RGTC2_UNORM:
- case PIPE_FORMAT_RGTC2_SNORM:
- case PIPE_FORMAT_LATC2_UNORM:
- case PIPE_FORMAT_LATC2_SNORM:
- util_format_rgtc2_unorm_unpack_rgba_8unorm(
- data, slice->pitch * rsc->cpp,
- source, trans->base.stride,
- box->width, box->height);
- break;
- default:
- assert(!"Unexpected format\n");
- break;
- }
-}
-
-static void
-fd_resource_flush(struct fd_transfer *trans, const struct pipe_box *box)
-{
- enum pipe_format format = trans->base.resource->format;
-
- switch (format) {
- case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
- case PIPE_FORMAT_X32_S8X24_UINT:
- fd_resource_flush_z32s8(trans, box);
- break;
- case PIPE_FORMAT_RGTC1_UNORM:
- case PIPE_FORMAT_RGTC1_SNORM:
- case PIPE_FORMAT_RGTC2_UNORM:
- case PIPE_FORMAT_RGTC2_SNORM:
- case PIPE_FORMAT_LATC1_UNORM:
- case PIPE_FORMAT_LATC1_SNORM:
- case PIPE_FORMAT_LATC2_UNORM:
- case PIPE_FORMAT_LATC2_SNORM:
- fd_resource_flush_rgtc(trans, box);
- break;
- default:
- assert(!"Unexpected staging transfer type");
- break;
- }
-}
-
static void fd_resource_transfer_flush_region(struct pipe_context *pctx,
struct pipe_transfer *ptrans,
const struct pipe_box *box)
{
struct fd_resource *rsc = fd_resource(ptrans->resource);
- struct fd_transfer *trans = fd_transfer(ptrans);
if (ptrans->resource->target == PIPE_BUFFER)
util_range_add(&rsc->valid_buffer_range,
ptrans->box.x + box->x,
ptrans->box.x + box->x + box->width);
-
- if (trans->staging)
- fd_resource_flush(trans, box);
}
static void
@@ -415,18 +317,9 @@ fd_resource_transfer_unmap(struct pipe_context *pctx,
{
struct fd_context *ctx = fd_context(pctx);
struct fd_resource *rsc = fd_resource(ptrans->resource);
- struct fd_transfer *trans = fd_transfer(ptrans);
-
- if (trans->staging && !(ptrans->usage & PIPE_TRANSFER_FLUSH_EXPLICIT)) {
- struct pipe_box box;
- u_box_2d(0, 0, ptrans->box.width, ptrans->box.height, &box);
- fd_resource_flush(trans, &box);
- }
if (!(ptrans->usage & PIPE_TRANSFER_UNSYNCHRONIZED)) {
fd_bo_cpu_fini(rsc->bo);
- if (rsc->stencil)
- fd_bo_cpu_fini(rsc->stencil->bo);
}
util_range_add(&rsc->valid_buffer_range,
@@ -435,8 +328,6 @@ fd_resource_transfer_unmap(struct pipe_context *pctx,
pipe_resource_reference(&ptrans->resource, NULL);
slab_free(&ctx->transfer_pool, ptrans);
-
- free(trans->staging);
}
static void *
@@ -486,8 +377,6 @@ fd_resource_transfer_map(struct pipe_context *pctx,
if (usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
realloc_bo(rsc, fd_bo_size(rsc->bo));
- if (rsc->stencil)
- realloc_bo(rsc->stencil, fd_bo_size(rsc->stencil->bo));
rebind_resource(ctx, prsc);
} else if ((usage & PIPE_TRANSFER_WRITE) &&
prsc->target == PIPE_BUFFER &&
@@ -569,97 +458,6 @@ fd_resource_transfer_map(struct pipe_context *pctx,
box->x / util_format_get_blockwidth(format) * rsc->cpp +
fd_resource_layer_offset(rsc, slice, box->z);
- if (prsc->format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT ||
- prsc->format == PIPE_FORMAT_X32_S8X24_UINT) {
- assert(trans->base.box.depth == 1);
-
- trans->base.stride = trans->base.box.width * rsc->cpp * 2;
- trans->staging = malloc(trans->base.stride * trans->base.box.height);
- if (!trans->staging)
- goto fail;
-
- /* if we're not discarding the whole range (or resource), we must copy
- * the real data in.
- */
- if (!(usage & (PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE |
- PIPE_TRANSFER_DISCARD_RANGE))) {
- struct fd_resource_slice *sslice =
- fd_resource_slice(rsc->stencil, level);
- void *sbuf = fd_bo_map(rsc->stencil->bo);
- if (!sbuf)
- goto fail;
-
- float *depth = (float *)(buf + slice->offset +
- fd_resource_layer_offset(rsc, slice, box->z) +
- box->y * slice->pitch * 4 + box->x * 4);
- uint8_t *stencil = sbuf + sslice->offset +
- fd_resource_layer_offset(rsc->stencil, sslice, box->z) +
- box->y * sslice->pitch + box->x;
-
- if (format != PIPE_FORMAT_X32_S8X24_UINT)
- util_format_z32_float_s8x24_uint_pack_z_float(
- trans->staging, trans->base.stride,
- depth, slice->pitch * 4,
- box->width, box->height);
-
- util_format_z32_float_s8x24_uint_pack_s_8uint(
- trans->staging, trans->base.stride,
- stencil, sslice->pitch,
- box->width, box->height);
- }
-
- buf = trans->staging;
- offset = 0;
- } else if (rsc->internal_format != format &&
- util_format_description(format)->layout == UTIL_FORMAT_LAYOUT_RGTC) {
- assert(trans->base.box.depth == 1);
-
- trans->base.stride = util_format_get_stride(
- format, trans->base.box.width);
- trans->staging = malloc(
- util_format_get_2d_size(format, trans->base.stride,
- trans->base.box.height));
- if (!trans->staging)
- goto fail;
-
- /* if we're not discarding the whole range (or resource), we must copy
- * the real data in.
- */
- if (!(usage & (PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE |
- PIPE_TRANSFER_DISCARD_RANGE))) {
- uint8_t *rgba8 = (uint8_t *)buf + slice->offset +
- fd_resource_layer_offset(rsc, slice, box->z) +
- box->y * slice->pitch * rsc->cpp + box->x * rsc->cpp;
-
- switch (format) {
- case PIPE_FORMAT_RGTC1_UNORM:
- case PIPE_FORMAT_RGTC1_SNORM:
- case PIPE_FORMAT_LATC1_UNORM:
- case PIPE_FORMAT_LATC1_SNORM:
- util_format_rgtc1_unorm_pack_rgba_8unorm(
- trans->staging, trans->base.stride,
- rgba8, slice->pitch * rsc->cpp,
- box->width, box->height);
- break;
- case PIPE_FORMAT_RGTC2_UNORM:
- case PIPE_FORMAT_RGTC2_SNORM:
- case PIPE_FORMAT_LATC2_UNORM:
- case PIPE_FORMAT_LATC2_SNORM:
- util_format_rgtc2_unorm_pack_rgba_8unorm(
- trans->staging, trans->base.stride,
- rgba8, slice->pitch * rsc->cpp,
- box->width, box->height);
- break;
- default:
- assert(!"Unexpected format");
- break;
- }
- }
-
- buf = trans->staging;
- offset = 0;
- }
-
*pptrans = ptrans;
return buf + offset;
@@ -683,8 +481,10 @@ fd_resource_destroy(struct pipe_screen *pscreen,
static boolean
fd_resource_get_handle(struct pipe_screen *pscreen,
+ struct pipe_context *pctx,
struct pipe_resource *prsc,
- struct winsys_handle *handle)
+ struct winsys_handle *handle,
+ unsigned usage)
{
struct fd_resource *rsc = fd_resource(prsc);
@@ -693,14 +493,6 @@ fd_resource_get_handle(struct pipe_screen *pscreen,
}
-static const struct u_resource_vtbl fd_resource_vtbl = {
- .resource_get_handle = fd_resource_get_handle,
- .resource_destroy = fd_resource_destroy,
- .transfer_map = fd_resource_transfer_map,
- .transfer_flush_region = fd_resource_transfer_flush_region,
- .transfer_unmap = fd_resource_transfer_unmap,
-};
-
static uint32_t
setup_slices(struct fd_resource *rsc, uint32_t alignment, enum pipe_format format)
{
@@ -836,14 +628,6 @@ fd_resource_create(struct pipe_screen *pscreen,
util_range_init(&rsc->valid_buffer_range);
- rsc->base.vtbl = &fd_resource_vtbl;
-
- if (format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT)
- format = PIPE_FORMAT_Z32_FLOAT;
- else if (screen->gpu_id < 400 &&
- util_format_description(format)->layout == UTIL_FORMAT_LAYOUT_RGTC)
- format = PIPE_FORMAT_R8G8B8A8_UNORM;
- rsc->internal_format = format;
rsc->cpp = util_format_get_blocksize(format);
assert(rsc->cpp);
@@ -897,19 +681,6 @@ fd_resource_create(struct pipe_screen *pscreen,
if (!rsc->bo)
goto fail;
- /* There is no native Z32F_S8 sampling or rendering format, so this must
- * be emulated via two separate textures. The depth texture still keeps
- * its Z32F_S8 format though, and we also keep a reference to a separate
- * S8 texture.
- */
- if (tmpl->format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT) {
- struct pipe_resource stencil = *tmpl;
- stencil.format = PIPE_FORMAT_S8_UINT;
- rsc->stencil = fd_resource(fd_resource_create(pscreen, &stencil));
- if (!rsc->stencil)
- goto fail;
- }
-
return prsc;
fail:
fd_resource_destroy(pscreen, prsc);
@@ -953,7 +724,6 @@ fd_resource_from_handle(struct pipe_screen *pscreen,
if (!rsc->bo)
goto fail;
- rsc->base.vtbl = &fd_resource_vtbl;
rsc->cpp = util_format_get_blocksize(tmpl->format);
slice->pitch = handle->stride / rsc->cpp;
slice->offset = handle->offset;
@@ -1185,21 +955,34 @@ fd_invalidate_resource(struct pipe_context *pctx, struct pipe_resource *prsc)
}
}
+static const struct u_transfer_vtbl transfer_vtbl = {
+ .resource_create = fd_resource_create,
+ .resource_destroy = fd_resource_destroy,
+ .transfer_map = fd_resource_transfer_map,
+ .transfer_flush_region = fd_resource_transfer_flush_region,
+ .transfer_unmap = fd_resource_transfer_unmap,
+};
+
void
fd_resource_screen_init(struct pipe_screen *pscreen)
{
- pscreen->resource_create = fd_resource_create;
+ bool fake_rgtc = fd_screen(pscreen)->gpu_id < 400;
+
+ pscreen->resource_create = u_transfer_helper_resource_create;
pscreen->resource_from_handle = fd_resource_from_handle;
- pscreen->resource_get_handle = u_resource_get_handle_vtbl;
- pscreen->resource_destroy = u_resource_destroy_vtbl;
+ pscreen->resource_get_handle = fd_resource_get_handle;
+ pscreen->resource_destroy = u_transfer_helper_resource_destroy;
+
+ pscreen->transfer_helper = u_transfer_helper_create(&transfer_vtbl,
+ true, fake_rgtc, true);
}
void
fd_resource_context_init(struct pipe_context *pctx)
{
- pctx->transfer_map = u_transfer_map_vtbl;
- pctx->transfer_flush_region = u_transfer_flush_region_vtbl;
- pctx->transfer_unmap = u_transfer_unmap_vtbl;
+ pctx->transfer_map = u_transfer_helper_transfer_map;
+ pctx->transfer_flush_region = u_transfer_helper_transfer_flush_region;
+ pctx->transfer_unmap = u_transfer_helper_transfer_unmap;
pctx->buffer_subdata = u_default_buffer_subdata;
pctx->texture_subdata = u_default_texture_subdata;
pctx->create_surface = fd_create_surface;
diff --git a/src/gallium/drivers/freedreno/freedreno_resource.h b/src/gallium/drivers/freedreno/freedreno_resource.h
index 5bdb0075761..855c7fdf5e9 100644
--- a/src/gallium/drivers/freedreno/freedreno_resource.h
+++ b/src/gallium/drivers/freedreno/freedreno_resource.h
@@ -32,6 +32,7 @@
#include "util/list.h"
#include "util/u_range.h"
#include "util/u_transfer.h"
+#include "util/u_transfer_helper.h"
#include "freedreno_batch.h"
#include "freedreno_util.h"
@@ -64,20 +65,15 @@ struct fd_resource_slice {
struct set;
struct fd_resource {
- struct u_resource base;
+ struct u_transfer_resource base;
struct fd_bo *bo;
uint32_t cpp;
- enum pipe_format internal_format;
bool layer_first; /* see above description */
uint32_t layer_size;
struct fd_resource_slice slices[MAX_MIP_LEVELS];
/* buffer range that has been initialized */
struct util_range valid_buffer_range;
- /* reference to the resource holding stencil data for a z32_s8 texture */
- /* TODO rename to secondary or auxiliary? */
- struct fd_resource *stencil;
-
/* bitmask of in-flight batches which reference this resource. Note
* that the batch doesn't hold reference to resources (but instead
* the fd_ringbuffer holds refs to the underlying fd_bo), but in case
@@ -123,7 +119,8 @@ pending(struct fd_resource *rsc, bool write)
if (write && rsc->batch_mask)
return true;
- if (rsc->stencil && pending(rsc->stencil, write))
+ if (rsc->base.stencil &&
+ pending(fd_resource(rsc->base.stencil), write))
return true;
return false;
@@ -131,7 +128,6 @@ pending(struct fd_resource *rsc, bool write)
struct fd_transfer {
struct pipe_transfer base;
- void *staging;
};
static inline struct fd_transfer *
--
2.13.6
More information about the mesa-dev
mailing list