[Mesa-dev] [PATCH 4/4] i965/gen10: Implement Wa3DStateMode

[Anuj Phogat]

On Mon, Oct 2, 2017 at 7:46 PM, Jason Ekstrand <jason at jlekstrand.net> wrote:
> On Mon, Oct 2, 2017 at 4:08 PM, Anuj Phogat <anuj.phogat at gmail.com> wrote:
>>
>> Cc: mesa-stable at lists.freedesktop.org
>> Signed-off-by: Anuj Phogat <anuj.phogat at gmail.com>
>> ---
>>  src/mesa/drivers/dri/i965/brw_state_upload.c | 7 +++++--
>>  1 file changed, 5 insertions(+), 2 deletions(-)
>>
>> diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c
>> b/src/mesa/drivers/dri/i965/brw_state_upload.c
>> index a1bf54dc72..c224355a2b 100644
>> --- a/src/mesa/drivers/dri/i965/brw_state_upload.c
>> +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
>> @@ -88,8 +88,11 @@ brw_upload_initial_gpu_state(struct brw_context *brw)
>>     if (devinfo->gen == 10) {
>>        BEGIN_BATCH(2);
>>        OUT_BATCH(_3DSTATE_3D_MODE  << 16 | (2 - 2));
>> -      OUT_BATCH(GEN10_FLOAT_BLEND_OPTIMIZATION_ENABLE << 16 |
>> -                GEN10_FLOAT_BLEND_OPTIMIZATION_ENABLE);
>> +      /* From gen10 workaround table in h/w specs:
>> +       * "On 3DSTATE_3D_MODE, driver must always program bits 31:16 of
>> DW1
>> +       *  a value of 0xFFFF"
>> +       */
>> +      OUT_BATCH(0xFFFF << 16 | GEN10_FLOAT_BLEND_OPTIMIZATION_ENABLE);
>
>
> Bits 31:16 are the mask bits.  By programming them to 0xFFFF, you're making
> it write the entire register and not just the float blend optimization
> enable bit.  If we're going to do that, we need to figure out what values we
> want in the other fields and always set them along with the float blend
> optimization enable bit.
>
Right. After looking at all other fields, I don't think we want to set
any of them except one. That field is "Slice Hashing Table Enable" which says:
"For gen10, when the total number of subslices enabled is 6,8,10, or
12, slice hashing table must be enabled."

I have no idea about slice hashing tables and I think enabling it
should be handled in a separate patch anyways.


> --Jason
>
>>
>>        ADVANCE_BATCH();
>>     }
>>
>> --
>> 2.13.5
>>
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>
>