[Mesa-dev] [PATCH] i965: Fix src0 vs src1 typo

[Eero Tamminen]

Hi,

On 03.10.2017 08:20, Matt Turner wrote:
> A typo caused us to copy src0's reg file to src1 rather than reading
> src1's as intended. This caused us to fail to compact instructions like
> 
>     mov(8)   g4<1>D    0D              { align1 1Q };
> 
> because src1 was set to immediate rather than architecture file. Fixing
> this reenables compaction (after the precompact() pass changes the data
> types):
> 
>     mov(8)   g4<1>UD   0x00000000UD    { align1 1Q compacted };
> 
> Fixes: 1cb0a7941b27 ("i965: Switch to using the logical register types")

FYI: the original commit regressed SynMark v7 CSDof test performance by 
1-2% on GEN9+, and this fixes that performance regression.


	- Eero

> ---
>   src/intel/compiler/brw_eu_compact.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/src/intel/compiler/brw_eu_compact.c b/src/intel/compiler/brw_eu_compact.c
> index 7674aa8b85..7b32270957 100644
> --- a/src/intel/compiler/brw_eu_compact.c
> +++ b/src/intel/compiler/brw_eu_compact.c
> @@ -998,7 +998,7 @@ precompact(const struct gen_device_info *devinfo, brw_inst inst)
>            (brw_inst_src0_type(devinfo, &inst) == BRW_REGISTER_TYPE_DF ||
>             brw_inst_src0_type(devinfo, &inst) == BRW_REGISTER_TYPE_UQ ||
>             brw_inst_src0_type(devinfo, &inst) == BRW_REGISTER_TYPE_Q))) {
> -      enum brw_reg_file file = brw_inst_src0_reg_file(devinfo, &inst);
> +      enum brw_reg_file file = brw_inst_src1_reg_file(devinfo, &inst);
>         brw_inst_set_src1_file_type(devinfo, &inst, file, BRW_REGISTER_TYPE_UD);
>      }
>   
>