[Mesa-dev] [PATCH] radv: set correct INDEX_TYPE for indexed indirect draws on GFX9

[Bas Nieuwenhuizen]

r-b

On Fri, Oct 13, 2017 at 6:01 PM, Samuel Pitoiset
<samuel.pitoiset at gmail.com> wrote:
> Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
> ---
>  src/amd/vulkan/radv_cmd_buffer.c | 10 ++++++++--
>  1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
> index 78a250214a..c0fe12b489 100644
> --- a/src/amd/vulkan/radv_cmd_buffer.c
> +++ b/src/amd/vulkan/radv_cmd_buffer.c
> @@ -3110,8 +3110,14 @@ radv_cmd_draw_indexed_indirect_count(
>
>         MAYBE_UNUSED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws, cmd_buffer->cs, 31 * MAX_VIEWS);
>
> -       radeon_emit(cmd_buffer->cs, PKT3(PKT3_INDEX_TYPE, 0, 0));
> -       radeon_emit(cmd_buffer->cs, cmd_buffer->state.index_type);
> +       if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9) {
> +               radeon_set_uconfig_reg_idx(cmd_buffer->cs,
> +                                          R_03090C_VGT_INDEX_TYPE,
> +                                          2, cmd_buffer->state.index_type);
> +       } else {
> +               radeon_emit(cmd_buffer->cs, PKT3(PKT3_INDEX_TYPE, 0, 0));
> +               radeon_emit(cmd_buffer->cs, cmd_buffer->state.index_type);
> +       }
>
>         radeon_emit(cmd_buffer->cs, PKT3(PKT3_INDEX_BASE, 1, 0));
>         radeon_emit(cmd_buffer->cs, index_va);
> --
> 2.14.2
>
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