[Mesa-dev] [PATCH] svga: fix format_conversion_table breakage

[Eric Engestrom]

On Monday, 2017-10-16 14:28:57 +0000, Brian Paul wrote:
> On 10/16/2017 04:24 AM, Eric Engestrom wrote:
> > On Saturday, 2017-10-14 16:52:29 +0000, Brian Paul wrote:
> > > The new A1B5G5R5_UNORM, X1B5G5R5_UNORM formats were added in the
> > > wrong place
> > 
> > Can you explain why this was wrong, so that one doesn't make the same
> > mistake next time? Maybe add that as a comment atop the array?
> > (Is it a simple case of "always add at the end" or is there more to it?)
> 
> The entries in the table are the same order as the PIPE_FORMAT_ tokens.
> I'll add a comment.
> 
> > 
> > > in commit ef874ee450b18e "gallium: Add support for 5551
> > > with the 1-bit field in the low bit."
> > 
> > Fixes: ef874ee450b18e "gallium: Add support for 5551 with the 1-bit field in the low bit."
> 
> Will do.
> 
> R-b?

Sure, sorry :)
Reviewed-by: Eric Engestrom <eric.engestrom at imgtec.com>

> 
> -Brian
> 
> > 
> > (so that scripts pick it up)
> > 
> > > ---
> > >   src/gallium/drivers/svga/svga_format.c | 4 ++--
> > >   1 file changed, 2 insertions(+), 2 deletions(-)
> > > 
> > > diff --git a/src/gallium/drivers/svga/svga_format.c b/src/gallium/drivers/svga/svga_format.c
> > > index b6ca9c5..bcaff60 100644
> > > --- a/src/gallium/drivers/svga/svga_format.c
> > > +++ b/src/gallium/drivers/svga/svga_format.c
> > > @@ -58,7 +58,6 @@ static const struct vgpu10_format_entry format_conversion_table[] =
> > >      { PIPE_FORMAT_A8R8G8B8_UNORM,        SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       0 },
> > >      { PIPE_FORMAT_X8R8G8B8_UNORM,        SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       0 },
> > >      { PIPE_FORMAT_B5G5R5A1_UNORM,        SVGA3D_FORMAT_INVALID,      SVGA3D_B5G5R5A1_UNORM,       TF_GEN_MIPS },
> > > -   { PIPE_FORMAT_A1B5G5R5_UNORM,        SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       0 },
> > >      { PIPE_FORMAT_B4G4R4A4_UNORM,        SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       0 },
> > >      { PIPE_FORMAT_B5G6R5_UNORM,          SVGA3D_FORMAT_INVALID,      SVGA3D_B5G6R5_UNORM,         TF_GEN_MIPS },
> > >      { PIPE_FORMAT_R10G10B10A2_UNORM,     SVGA3D_R10G10B10A2_UNORM,   SVGA3D_R10G10B10A2_UNORM,    TF_GEN_MIPS },
> > > @@ -176,7 +175,6 @@ static const struct vgpu10_format_entry format_conversion_table[] =
> > >      { PIPE_FORMAT_R5SG5SB6U_NORM,        SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       0 },
> > >      { PIPE_FORMAT_A8B8G8R8_UNORM,        SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       0 },
> > >      { PIPE_FORMAT_B5G5R5X1_UNORM,        SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       0 },
> > > -   { PIPE_FORMAT_X1B5G5R5_UNORM,        SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       0 },
> > >      { PIPE_FORMAT_R10G10B10A2_USCALED,   SVGA3D_R10G10B10A2_UNORM,   SVGA3D_FORMAT_INVALID,       VF_PUINT_TO_USCALED },
> > >      { PIPE_FORMAT_R11G11B10_FLOAT,       SVGA3D_FORMAT_INVALID,      SVGA3D_R11G11B10_FLOAT,      TF_GEN_MIPS },
> > >      { PIPE_FORMAT_R9G9B9E5_FLOAT,        SVGA3D_FORMAT_INVALID,      SVGA3D_R9G9B9E5_SHAREDEXP,   0 },
> > > @@ -363,6 +361,8 @@ static const struct vgpu10_format_entry format_conversion_table[] =
> > >      { PIPE_FORMAT_ASTC_12x12_SRGB,       SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       0 },
> > >      { PIPE_FORMAT_P016,                  SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       0 },
> > >      { PIPE_FORMAT_R10G10B10X2_UNORM,     SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       0 },
> > > +   { PIPE_FORMAT_A1B5G5R5_UNORM,        SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       0 },
> > > +   { PIPE_FORMAT_X1B5G5R5_UNORM,        SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       0 },
> > >   };
> > > 
> > > 
> > > --
> > > 1.9.1
> > > 
>