[Mesa-dev] [PATCH 6/9] radv: rename radv_cmd_buffer_flush_state() to radv_draw()

[Samuel Pitoiset]

Similar to the dispatch codepath.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
---
 src/amd/vulkan/radv_cmd_buffer.c | 85 ++++++++++++++++++----------------------
 1 file changed, 39 insertions(+), 46 deletions(-)

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index e68174ff69..f958d1a14e 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -1758,38 +1758,6 @@ radv_emit_draw_registers(struct radv_cmd_buffer *cmd_buffer, bool indexed_draw,
 	}
 }
 
-static void
-radv_cmd_buffer_flush_state(struct radv_cmd_buffer *cmd_buffer,
-			    bool indexed_draw, bool instanced_draw,
-			    bool indirect_draw,
-			    uint32_t draw_vertex_count)
-{
-	MAYBE_UNUSED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws,
-							   cmd_buffer->cs, 4096);
-
-	if (!radv_cmd_buffer_update_vertex_descriptors(cmd_buffer))
-		return;
-
-	if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_PIPELINE)
-		radv_emit_graphics_pipeline(cmd_buffer);
-
-	if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_RENDER_TARGETS)
-		radv_emit_framebuffer_state(cmd_buffer);
-
-	radv_emit_draw_registers(cmd_buffer, indexed_draw, instanced_draw,
-				 indirect_draw, draw_vertex_count);
-
-	radv_cmd_buffer_flush_dynamic_state(cmd_buffer);
-
-	radv_flush_descriptors(cmd_buffer, VK_SHADER_STAGE_ALL_GRAPHICS);
-	radv_flush_constants(cmd_buffer, cmd_buffer->state.pipeline,
-			     VK_SHADER_STAGE_ALL_GRAPHICS);
-
-	assert(cmd_buffer->cs->cdw <= cdw_max);
-
-	si_emit_cache_flush(cmd_buffer);
-}
-
 static void radv_stage_flush(struct radv_cmd_buffer *cmd_buffer,
 			     VkPipelineStageFlags src_stage_mask)
 {
@@ -2985,13 +2953,6 @@ radv_emit_draw_packets(struct radv_cmd_buffer *cmd_buffer,
 	struct radv_device *device = cmd_buffer->device;
 	struct radeon_winsys_cs *cs = cmd_buffer->cs;
 
-	radv_cmd_buffer_flush_state(cmd_buffer, info->indexed,
-				    info->instance_count > 1, info->indirect,
-				    info->indirect ? 0 : info->count);
-
-	MAYBE_UNUSED unsigned cdw_max = radeon_check_space(device->ws, cs,
-							   31 * MAX_VIEWS);
-
 	if (info->indexed) {
 		if (device->physical_device->rad_info.chip_class >= GFX9) {
 			radeon_set_uconfig_reg_idx(cs, R_03090C_VGT_INDEX_TYPE,
@@ -3099,8 +3060,40 @@ radv_emit_draw_packets(struct radv_cmd_buffer *cmd_buffer,
 			}
 		}
 	}
+}
 
-	assert(cs->cdw <= cdw_max);
+static void
+radv_draw(struct radv_cmd_buffer *cmd_buffer,
+	  const struct radv_draw_info *info)
+{
+	MAYBE_UNUSED unsigned cdw_max =
+		radeon_check_space(cmd_buffer->device->ws,
+				   cmd_buffer->cs, 4096);
+
+	if (!radv_cmd_buffer_update_vertex_descriptors(cmd_buffer))
+		return;
+
+	if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_PIPELINE)
+		radv_emit_graphics_pipeline(cmd_buffer);
+
+	if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_RENDER_TARGETS)
+		radv_emit_framebuffer_state(cmd_buffer);
+
+	radv_emit_draw_registers(cmd_buffer, info->indexed,
+				 info->instance_count > 1, info->indirect,
+				 info->indirect ? 0 : info->count);
+
+	radv_cmd_buffer_flush_dynamic_state(cmd_buffer);
+
+	radv_flush_descriptors(cmd_buffer, VK_SHADER_STAGE_ALL_GRAPHICS);
+	radv_flush_constants(cmd_buffer, cmd_buffer->state.pipeline,
+			     VK_SHADER_STAGE_ALL_GRAPHICS);
+
+	si_emit_cache_flush(cmd_buffer);
+
+	radv_emit_draw_packets(cmd_buffer, info);
+
+	assert(cmd_buffer->cs->cdw <= cdw_max);
 	radv_cmd_buffer_after_draw(cmd_buffer);
 }
 
@@ -3119,7 +3112,7 @@ void radv_CmdDraw(
 	info.first_instance = firstInstance;
 	info.vertex_offset = firstVertex;
 
-	radv_emit_draw_packets(cmd_buffer, &info);
+	radv_draw(cmd_buffer, &info);
 }
 
 void radv_CmdDrawIndexed(
@@ -3140,7 +3133,7 @@ void radv_CmdDrawIndexed(
 	info.vertex_offset = vertexOffset;
 	info.first_instance = firstInstance;
 
-	radv_emit_draw_packets(cmd_buffer, &info);
+	radv_draw(cmd_buffer, &info);
 }
 
 void radv_CmdDrawIndirect(
@@ -3159,7 +3152,7 @@ void radv_CmdDrawIndirect(
 	info.indirect_offset = offset;
 	info.stride = stride;
 
-	radv_emit_draw_packets(cmd_buffer, &info);
+	radv_draw(cmd_buffer, &info);
 }
 
 void radv_CmdDrawIndexedIndirect(
@@ -3179,7 +3172,7 @@ void radv_CmdDrawIndexedIndirect(
 	info.indirect_offset = offset;
 	info.stride = stride;
 
-	radv_emit_draw_packets(cmd_buffer, &info);
+	radv_draw(cmd_buffer, &info);
 }
 
 void radv_CmdDrawIndirectCountAMD(
@@ -3203,7 +3196,7 @@ void radv_CmdDrawIndirectCountAMD(
 	info.count_buffer_offset = countBufferOffset;
 	info.stride = stride;
 
-	radv_emit_draw_packets(cmd_buffer, &info);
+	radv_draw(cmd_buffer, &info);
 }
 
 void radv_CmdDrawIndexedIndirectCountAMD(
@@ -3228,7 +3221,7 @@ void radv_CmdDrawIndexedIndirectCountAMD(
 	info.count_buffer_offset = countBufferOffset;
 	info.stride = stride;
 
-	radv_emit_draw_packets(cmd_buffer, &info);
+	radv_draw(cmd_buffer, &info);
 }
 
 struct radv_dispatch_info {
-- 
2.14.2