[Mesa-dev] [PATCH v2 16/32] i965: Don't rely on nir for uses_texture_gather
Timothy Arceri
tarceri at itsqueeze.com
Thu Oct 19 22:07:45 UTC 2017
Maybe you should just do:
prog->nir->info = prog->info;
After you restore nir from the cache?
On 19/10/17 16:32, Jordan Justen wrote:
> When a program is restored from the shader cache, prog->nir will be
> NULL, but prog->info will be restored.
>
> Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
> ---
> src/mesa/drivers/dri/i965/brw_wm.c | 4 ++--
> src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 12 ++++++------
> 2 files changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
> index 69d8e61e40..e511f0f70b 100644
> --- a/src/mesa/drivers/dri/i965/brw_wm.c
> +++ b/src/mesa/drivers/dri/i965/brw_wm.c
> @@ -330,7 +330,7 @@ brw_populate_sampler_prog_key_data(struct gl_context *ctx,
> }
>
> /* gather4 for RG32* is broken in multiple ways on Gen7. */
> - if (devinfo->gen == 7 && prog->nir->info.uses_texture_gather) {
> + if (devinfo->gen == 7 && prog->info.uses_texture_gather) {
> switch (img->InternalFormat) {
> case GL_RG32I:
> case GL_RG32UI: {
> @@ -368,7 +368,7 @@ brw_populate_sampler_prog_key_data(struct gl_context *ctx,
> /* Gen6's gather4 is broken for UINT/SINT; we treat them as
> * UNORM/FLOAT instead and fix it in the shader.
> */
> - if (devinfo->gen == 6 && prog->nir->info.uses_texture_gather) {
> + if (devinfo->gen == 6 && prog->info.uses_texture_gather) {
> key->gen6_gather_wa[s] = gen6_gather_workaround(img->InternalFormat);
> }
>
> diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> index f4e9cf48c6..4f454dae44 100644
> --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> @@ -1198,15 +1198,15 @@ brw_update_texture_surfaces(struct brw_context *brw)
> * allows the surface format to be overriden for only the
> * gather4 messages. */
> if (devinfo->gen < 8) {
> - if (vs && vs->nir->info.uses_texture_gather)
> + if (vs && vs->info.uses_texture_gather)
> update_stage_texture_surfaces(brw, vs, &brw->vs.base, true, 0);
> - if (tcs && tcs->nir->info.uses_texture_gather)
> + if (tcs && tcs->info.uses_texture_gather)
> update_stage_texture_surfaces(brw, tcs, &brw->tcs.base, true, 0);
> - if (tes && tes->nir->info.uses_texture_gather)
> + if (tes && tes->info.uses_texture_gather)
> update_stage_texture_surfaces(brw, tes, &brw->tes.base, true, 0);
> - if (gs && gs->nir->info.uses_texture_gather)
> + if (gs && gs->info.uses_texture_gather)
> update_stage_texture_surfaces(brw, gs, &brw->gs.base, true, 0);
> - if (fs && fs->nir->info.uses_texture_gather)
> + if (fs && fs->info.uses_texture_gather)
> update_stage_texture_surfaces(brw, fs, &brw->wm.base, true, 0);
> }
>
> @@ -1253,7 +1253,7 @@ brw_update_cs_texture_surfaces(struct brw_context *brw)
> * gather4 messages.
> */
> if (devinfo->gen < 8) {
> - if (cs && cs->nir->info.uses_texture_gather)
> + if (cs && cs->info.uses_texture_gather)
> update_stage_texture_surfaces(brw, cs, &brw->cs.base, true, 0);
> }
>
>
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