[Mesa-dev] [PATCH 4/6] radeonsi: move pipe debug callback to si_context

Nicolai Hähnle nhaehnle at gmail.com
Sun Oct 22 18:45:38 UTC 2017


From: Nicolai Hähnle <nicolai.haehnle at amd.com>

---
 src/gallium/drivers/radeon/r600_pipe_common.c   | 12 ------------
 src/gallium/drivers/radeon/r600_pipe_common.h   |  1 -
 src/gallium/drivers/radeonsi/si_compute.c       |  6 +++---
 src/gallium/drivers/radeonsi/si_pipe.c          | 12 ++++++++++++
 src/gallium/drivers/radeonsi/si_pipe.h          |  1 +
 src/gallium/drivers/radeonsi/si_state_shaders.c |  6 +++---
 6 files changed, 19 insertions(+), 19 deletions(-)

diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c
index b77d85901f0..0ac86bcd811 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -584,31 +584,20 @@ static enum pipe_reset_status r600_get_reset_status(struct pipe_context *ctx)
 	unsigned latest = rctx->ws->query_value(rctx->ws,
 						RADEON_GPU_RESET_COUNTER);
 
 	if (rctx->gpu_reset_counter == latest)
 		return PIPE_NO_RESET;
 
 	rctx->gpu_reset_counter = latest;
 	return PIPE_UNKNOWN_CONTEXT_RESET;
 }
 
-static void r600_set_debug_callback(struct pipe_context *ctx,
-				    const struct pipe_debug_callback *cb)
-{
-	struct r600_common_context *rctx = (struct r600_common_context *)ctx;
-
-	if (cb)
-		rctx->debug = *cb;
-	else
-		memset(&rctx->debug, 0, sizeof(rctx->debug));
-}
-
 static void r600_set_device_reset_callback(struct pipe_context *ctx,
 					   const struct pipe_device_reset_callback *cb)
 {
 	struct r600_common_context *rctx = (struct r600_common_context *)ctx;
 
 	if (cb)
 		rctx->device_reset_callback = *cb;
 	else
 		memset(&rctx->device_reset_callback, 0,
 		       sizeof(rctx->device_reset_callback));
@@ -689,21 +678,20 @@ bool si_common_context_init(struct r600_common_context *rctx,
 	rctx->chip_class = rscreen->chip_class;
 
 	rctx->b.invalidate_resource = si_invalidate_resource;
 	rctx->b.resource_commit = r600_resource_commit;
 	rctx->b.transfer_map = u_transfer_map_vtbl;
 	rctx->b.transfer_flush_region = u_transfer_flush_region_vtbl;
 	rctx->b.transfer_unmap = u_transfer_unmap_vtbl;
 	rctx->b.texture_subdata = u_default_texture_subdata;
 	rctx->b.memory_barrier = r600_memory_barrier;
 	rctx->b.flush = r600_flush_from_st;
-	rctx->b.set_debug_callback = r600_set_debug_callback;
 	rctx->b.create_fence_fd = r600_create_fence_fd;
 	rctx->b.fence_server_sync = r600_fence_server_sync;
 	rctx->dma_clear_buffer = r600_dma_clear_buffer_fallback;
 	rctx->b.buffer_subdata = si_buffer_subdata;
 
 	if (rscreen->info.drm_major == 2 && rscreen->info.drm_minor >= 43) {
 		rctx->b.get_device_reset_status = r600_get_reset_status;
 		rctx->gpu_reset_counter =
 			rctx->ws->query_value(rctx->ws,
 					      RADEON_GPU_RESET_COUNTER);
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index a7c91cb8a12..000b0647fcb 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -590,21 +590,20 @@ struct r600_common_context {
 	struct {
 		struct r600_texture		*tex;
 		/* Query queue: 0 = usually active, 1 = waiting, 2 = readback. */
 		struct pipe_query		*ps_stats[3];
 		/* If all slots are used and another slot is needed,
 		 * the least recently used slot is evicted based on this. */
 		int64_t				last_use_timestamp;
 		bool				query_active;
 	} dcc_stats[5];
 
-	struct pipe_debug_callback	debug;
 	struct pipe_device_reset_callback device_reset_callback;
 	struct u_log_context		*log;
 
 	void				*query_result_shader;
 
 	/* Copy one resource to another using async DMA. */
 	void (*dma_copy)(struct pipe_context *ctx,
 			 struct pipe_resource *dst,
 			 unsigned dst_level,
 			 unsigned dst_x, unsigned dst_y, unsigned dst_z,
diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c
index 942750b2256..e55988af4cc 100644
--- a/src/gallium/drivers/radeonsi/si_compute.c
+++ b/src/gallium/drivers/radeonsi/si_compute.c
@@ -161,26 +161,26 @@ static void *si_create_compute_state(
 					cso->ir_type == PIPE_SHADER_IR_NATIVE;
 
 	if (cso->ir_type == PIPE_SHADER_IR_TGSI) {
 		program->tokens = tgsi_dup_tokens(cso->prog);
 		if (!program->tokens) {
 			FREE(program);
 			return NULL;
 		}
 
 		program->compiler_ctx_state.tm = sctx->tm;
-		program->compiler_ctx_state.debug = sctx->b.debug;
+		program->compiler_ctx_state.debug = sctx->debug;
 		program->compiler_ctx_state.is_debug_context = sctx->is_debug;
 		p_atomic_inc(&sscreen->b.num_shaders_created);
 		util_queue_fence_init(&program->ready);
 
-		if ((sctx->b.debug.debug_message && !sctx->b.debug.async) ||
+		if ((sctx->debug.debug_message && !sctx->debug.async) ||
 		    sctx->is_debug ||
 		    si_can_dump_shader(&sscreen->b, PIPE_SHADER_COMPUTE))
 			si_create_compute_state_async(program, -1);
 		else
 			util_queue_add_job(&sscreen->shader_compiler_queue,
 					   program, &program->ready,
 					   si_create_compute_state_async, NULL);
 	} else {
 		const struct pipe_llvm_program_header *header;
 		const char *code;
@@ -189,21 +189,21 @@ static void *si_create_compute_state(
 
 		ac_elf_read(code, header->num_bytes, &program->shader.binary);
 		if (program->use_code_object_v2) {
 			const amd_kernel_code_t *code_object =
 				si_compute_get_code_object(program, 0);
 			code_object_to_config(code_object, &program->shader.config);
 		} else {
 			si_shader_binary_read_config(&program->shader.binary,
 				     &program->shader.config, 0);
 		}
-		si_shader_dump(sctx->screen, &program->shader, &sctx->b.debug,
+		si_shader_dump(sctx->screen, &program->shader, &sctx->debug,
 			       PIPE_SHADER_COMPUTE, stderr, true);
 		if (si_shader_binary_upload(sctx->screen, &program->shader) < 0) {
 			fprintf(stderr, "LLVM failed to upload shader\n");
 			FREE(program);
 			return NULL;
 		}
 	}
 
 	return program;
 }
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 759d5394719..0d2132efb54 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -155,20 +155,31 @@ si_create_llvm_target_machine(struct si_screen *sscreen)
 		 sscreen->b.debug_flags & DBG(SI_SCHED) ? ",+si-scheduler" : "");
 
 	return LLVMCreateTargetMachine(ac_get_llvm_target(triple), triple,
 				       si_get_llvm_processor_name(sscreen->b.family),
 				       features,
 				       LLVMCodeGenLevelDefault,
 				       LLVMRelocDefault,
 				       LLVMCodeModelDefault);
 }
 
+static void si_set_debug_callback(struct pipe_context *ctx,
+				  const struct pipe_debug_callback *cb)
+{
+	struct si_context *sctx = (struct si_context *)ctx;
+
+	if (cb)
+		sctx->debug = *cb;
+	else
+		memset(&sctx->debug, 0, sizeof(sctx->debug));
+}
+
 static void si_set_log_context(struct pipe_context *ctx,
 			       struct u_log_context *log)
 {
 	struct si_context *sctx = (struct si_context *)ctx;
 	sctx->b.log = log;
 
 	if (log)
 		u_log_add_auto_logger(log, si_auto_log_cs, sctx);
 }
 
@@ -183,20 +194,21 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen,
 	if (!sctx)
 		return NULL;
 
 	if (flags & PIPE_CONTEXT_DEBUG)
 		sscreen->record_llvm_ir = true; /* racy but not critical */
 
 	sctx->b.b.screen = screen; /* this must be set first */
 	sctx->b.b.priv = NULL;
 	sctx->b.b.destroy = si_destroy_context;
 	sctx->b.b.emit_string_marker = si_emit_string_marker;
+	sctx->b.b.set_debug_callback = si_set_debug_callback;
 	sctx->b.b.set_log_context = si_set_log_context;
 	sctx->b.set_atom_dirty = (void *)si_set_atom_dirty;
 	sctx->screen = sscreen; /* Easy accessing of screen/winsys. */
 	sctx->is_debug = (flags & PIPE_CONTEXT_DEBUG) != 0;
 
 	if (!si_common_context_init(&sctx->b, &sscreen->b, flags))
 		goto fail;
 
 	if (sscreen->b.info.drm_major == 3)
 		sctx->b.b.get_device_reset_status = si_amdgpu_get_reset_status;
diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index c162a0fcd62..d06d737ebd0 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -356,20 +356,21 @@ struct si_context {
 	void				*custom_blend_resolve;
 	void				*custom_blend_fmask_decompress;
 	void				*custom_blend_eliminate_fastclear;
 	void				*custom_blend_dcc_decompress;
 	void				*vs_blit_pos;
 	void				*vs_blit_pos_layered;
 	void				*vs_blit_color;
 	void				*vs_blit_color_layered;
 	void				*vs_blit_texcoord;
 	struct si_screen		*screen;
+	struct pipe_debug_callback	debug;
 	LLVMTargetMachineRef		tm; /* only non-threaded compilation */
 	struct si_shader_ctx_state	fixed_func_tcs_shader;
 	struct r600_resource		*wait_mem_scratch;
 	unsigned			wait_mem_number;
 	uint16_t			prefetch_L2_mask;
 
 	bool				gfx_flush_in_progress:1;
 	bool				compute_is_busy:1;
 
 	/* Atoms (direct states). */
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
index d0bef09748f..1f6bb02a983 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -2042,21 +2042,21 @@ static void *si_create_shader_selector(struct pipe_context *ctx,
 	struct si_context *sctx = (struct si_context*)ctx;
 	struct si_shader_selector *sel = CALLOC_STRUCT(si_shader_selector);
 	int i;
 
 	if (!sel)
 		return NULL;
 
 	pipe_reference_init(&sel->reference, 1);
 	sel->screen = sscreen;
 	sel->compiler_ctx_state.tm = sctx->tm;
-	sel->compiler_ctx_state.debug = sctx->b.debug;
+	sel->compiler_ctx_state.debug = sctx->debug;
 	sel->compiler_ctx_state.is_debug_context = sctx->is_debug;
 
 	sel->so = state->stream_output;
 
 	if (state->type == PIPE_SHADER_IR_TGSI) {
 		sel->tokens = tgsi_dup_tokens(state->tokens);
 		if (!sel->tokens) {
 			FREE(sel);
 			return NULL;
 		}
@@ -2265,21 +2265,21 @@ static void *si_create_shader_selector(struct pipe_context *ctx,
 		sel->db_shader_control |= S_02880C_Z_ORDER(V_02880C_LATE_Z) |
 					  S_02880C_EXEC_ON_HIER_FAIL(1);
 	} else {
 		/* Case 1. */
 		sel->db_shader_control |= S_02880C_Z_ORDER(V_02880C_EARLY_Z_THEN_LATE_Z);
 	}
 
 	(void) mtx_init(&sel->mutex, mtx_plain);
 	util_queue_fence_init(&sel->ready);
 
-	if ((sctx->b.debug.debug_message && !sctx->b.debug.async) ||
+	if ((sctx->debug.debug_message && !sctx->debug.async) ||
 	    sctx->is_debug ||
 	    si_can_dump_shader(&sscreen->b, sel->info.processor))
 		si_init_shader_selector_async(sel, -1);
 	else
 		util_queue_add_job(&sscreen->shader_compiler_queue, sel,
                                    &sel->ready, si_init_shader_selector_async,
                                    NULL);
 
 	return sel;
 }
@@ -3230,21 +3230,21 @@ bool si_update_shaders(struct si_context *sctx)
 	struct si_compiler_ctx_state compiler_state;
 	struct si_state_rasterizer *rs = sctx->queued.named.rasterizer;
 	struct si_shader *old_vs = si_get_vs_state(sctx);
 	bool old_clip_disable = old_vs ? old_vs->key.opt.clip_disable : false;
 	struct si_shader *old_ps = sctx->ps_shader.current;
 	unsigned old_spi_shader_col_format =
 		old_ps ? old_ps->key.part.ps.epilog.spi_shader_col_format : 0;
 	int r;
 
 	compiler_state.tm = sctx->tm;
-	compiler_state.debug = sctx->b.debug;
+	compiler_state.debug = sctx->debug;
 	compiler_state.is_debug_context = sctx->is_debug;
 
 	/* Update stages before GS. */
 	if (sctx->tes_shader.cso) {
 		if (!sctx->tf_ring) {
 			si_init_tess_factor_ring(sctx);
 			if (!sctx->tf_ring)
 				return false;
 		}
 
-- 
2.11.0



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