[Mesa-dev] [PATCH v3 21/34] i965: add initial implementation of on disk shader cache
Jason Ekstrand
jason at jlekstrand.net
Tue Oct 24 15:26:36 UTC 2017
looks good
On Tue, Oct 24, 2017 at 12:06 AM, Jordan Justen <jordan.l.justen at intel.com>
wrote:
> On 2017-10-23 19:48:51, Jason Ekstrand wrote:
> >
> > On Sun, Oct 22, 2017 at 1:01 PM, Jordan Justen <
> jordan.l.justen at intel.com>
> > wrote:
> >
> > > + #define SET_UPLOAD_PARAMS(sh, sh_caps, prog) \
> > > + do { \
> > > + prog_key.sh.program_string_id = prog->id; \
> > > + cache_id = BRW_CACHE_##sh_caps##_PROG; \
> > > + max_threads = devinfo->max_##sh##_threads; \
> > > + stage_state = &brw->sh.base; \
> > > + } while(0)
> > > +
> > > + switch (stage) {
> > > + case MESA_SHADER_VERTEX: {
> > > + struct brw_program *vp = (struct brw_program *) prog;
> > >
> >
> > I think you can move the cast inside the macro. It's all brw_program as
> > far as I can see.
> >
> >
> > > + SET_UPLOAD_PARAMS(vs, VS, vp);
> > > + break;
> > > + }
>
> Yeah, it looks like it can be simplified:
>
> diff --git a/src/mesa/drivers/dri/i965/brw_disk_cache.c
> b/src/mesa/drivers/dri/i965/brw_disk_cache.c
> index 9b5e0c3e078..f3b2a6f9b51 100644
> --- a/src/mesa/drivers/dri/i965/brw_disk_cache.c
> +++ b/src/mesa/drivers/dri/i965/brw_disk_cache.c
> @@ -228,45 +228,33 @@ read_and_upload(struct brw_context *brw, struct
> disk_cache *cache,
> unsigned max_threads;
> struct brw_stage_state *stage_state;
>
> - #define SET_UPLOAD_PARAMS(sh, sh_caps, prog) \
> + #define SET_UPLOAD_PARAMS(sh, sh_caps) \
> do { \
> - prog_key.sh.program_string_id = prog->id; \
> + prog_key.sh.program_string_id = brw_program(prog)->id; \
> cache_id = BRW_CACHE_##sh_caps##_PROG; \
> max_threads = devinfo->max_##sh##_threads; \
> stage_state = &brw->sh.base; \
> } while(0)
>
> switch (stage) {
> - case MESA_SHADER_VERTEX: {
> - struct brw_program *vp = (struct brw_program *) prog;
> - SET_UPLOAD_PARAMS(vs, VS, vp);
> + case MESA_SHADER_VERTEX:
> + SET_UPLOAD_PARAMS(vs, VS);
> break;
> - }
> - case MESA_SHADER_TESS_CTRL: {
> - struct brw_program *tcp = (struct brw_program *) prog;
> - SET_UPLOAD_PARAMS(tcs, TCS, tcp);
> + case MESA_SHADER_TESS_CTRL:
> + SET_UPLOAD_PARAMS(tcs, TCS);
> break;
> - }
> - case MESA_SHADER_TESS_EVAL: {
> - struct brw_program *tep = (struct brw_program *) prog;
> - SET_UPLOAD_PARAMS(tes, TES, tep);
> + case MESA_SHADER_TESS_EVAL:
> + SET_UPLOAD_PARAMS(tes, TES);
> break;
> - }
> - case MESA_SHADER_GEOMETRY: {
> - struct brw_program *gp = (struct brw_program *) prog;
> - SET_UPLOAD_PARAMS(gs, GS, gp);
> + case MESA_SHADER_GEOMETRY:
> + SET_UPLOAD_PARAMS(gs, GS);
> break;
> - }
> - case MESA_SHADER_FRAGMENT: {
> - struct brw_program *wp = (struct brw_program *) prog;
> - SET_UPLOAD_PARAMS(wm, FS, wp);
> + case MESA_SHADER_FRAGMENT:
> + SET_UPLOAD_PARAMS(wm, FS);
> break;
> - }
> - case MESA_SHADER_COMPUTE: {
> - struct brw_program *cp = (struct brw_program *) prog;
> - SET_UPLOAD_PARAMS(cs, CS, cp);
> + case MESA_SHADER_COMPUTE:
> + SET_UPLOAD_PARAMS(cs, CS);
> break;
> - }
> default:
> unreachable("Unsupported stage!");
> }
>
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