[Mesa-dev] [PATCH] ac/llvm: use the ac i32 0/1 and f32 0/1 llvm types.

Dave Airlie airlied at gmail.com
Thu Oct 26 05:14:02 UTC 2017


From: Dave Airlie <airlied at redhat.com>

This just avoids having two copies of these.

Signed-off-by: Dave Airlie <airlied at redhat.com>
---
 src/amd/common/ac_nir_to_llvm.c | 112 +++++++++++++++++++---------------------
 1 file changed, 52 insertions(+), 60 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index cbd646e..00a3ec2 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -152,10 +152,6 @@ struct nir_to_llvm_context {
 
 	LLVMValueRef i1true;
 	LLVMValueRef i1false;
-	LLVMValueRef i32zero;
-	LLVMValueRef i32one;
-	LLVMValueRef f32zero;
-	LLVMValueRef f32one;
 	LLVMValueRef v4f32empty;
 
 	unsigned uniform_md_kind;
@@ -1025,15 +1021,11 @@ static void setup_types(struct nir_to_llvm_context *ctx)
 
 	ctx->i1false = LLVMConstInt(ctx->i1, 0, false);
 	ctx->i1true = LLVMConstInt(ctx->i1, 1, false);
-	ctx->i32zero = LLVMConstInt(ctx->i32, 0, false);
-	ctx->i32one = LLVMConstInt(ctx->i32, 1, false);
-	ctx->f32zero = LLVMConstReal(ctx->f32, 0.0);
-	ctx->f32one = LLVMConstReal(ctx->f32, 1.0);
-
-	args[0] = ctx->f32zero;
-	args[1] = ctx->f32zero;
-	args[2] = ctx->f32zero;
-	args[3] = ctx->f32one;
+
+	args[0] = ctx->ac.f32_0;
+	args[1] = ctx->ac.f32_0;
+	args[2] = ctx->ac.f32_0;
+	args[3] = ctx->ac.f32_1;
 	ctx->v4f32empty = LLVMConstVector(args, 4);
 
 	ctx->uniform_md_kind =
@@ -1416,7 +1408,7 @@ static LLVMValueRef emit_f2f16(struct nir_to_llvm_context *ctx,
 	result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
 
 	if (ctx->options->chip_class >= VI)
-		result = LLVMBuildSelect(ctx->builder, cond, ctx->f32zero, result, "");
+		result = LLVMBuildSelect(ctx->builder, cond, ctx->ac.f32_0, result, "");
 	else {
 		/* for SI/CIK */
 		/* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
@@ -1429,9 +1421,9 @@ static LLVMValueRef emit_f2f16(struct nir_to_llvm_context *ctx,
 				     LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
 				     temp, "");
 		cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealUNE,
-				      temp, ctx->f32zero, "");
+				      temp, ctx->ac.f32_0, "");
 		cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
-		result = LLVMBuildSelect(ctx->builder, cond, ctx->f32zero, result, "");
+		result = LLVMBuildSelect(ctx->builder, cond, ctx->ac.f32_0, result, "");
 	}
 	return result;
 }
@@ -2838,7 +2830,7 @@ load_tcs_input(struct nir_to_llvm_context *ctx,
 	for (unsigned i = 0; i < instr->num_components + comp; i++) {
 		value[i] = ac_lds_load(&ctx->ac, dw_addr);
 		dw_addr = LLVMBuildAdd(ctx->builder, dw_addr,
-				       ctx->i32one, "");
+				       ctx->ac.i32_1, "");
 	}
 	result = build_varying_gather_values(&ctx->ac, value, instr->num_components, comp);
 	result = LLVMBuildBitCast(ctx->builder, result, get_def_type(ctx->nir, &instr->dest.ssa), "");
@@ -2877,7 +2869,7 @@ load_tcs_output(struct nir_to_llvm_context *ctx,
 	for (unsigned i = comp; i < instr->num_components + comp; i++) {
 		value[i] = ac_lds_load(&ctx->ac, dw_addr);
 		dw_addr = LLVMBuildAdd(ctx->builder, dw_addr,
-				       ctx->i32one, "");
+				       ctx->ac.i32_1, "");
 	}
 	result = build_varying_gather_values(&ctx->ac, value, instr->num_components, comp);
 	result = LLVMBuildBitCast(ctx->builder, result, get_def_type(ctx->nir, &instr->dest.ssa), "");
@@ -2945,7 +2937,7 @@ store_tcs_output(struct nir_to_llvm_context *ctx,
 						    4 * (base + chan), 1, 0, true, false);
 
 		dw_addr = LLVMBuildAdd(ctx->builder, dw_addr,
-				       ctx->i32one, "");
+				       ctx->ac.i32_1, "");
 	}
 
 	if (writemask == 0xF) {
@@ -3023,12 +3015,12 @@ load_gs_input(struct nir_to_llvm_context *ctx,
 			args[0] = ctx->esgs_ring;
 			args[1] = vtx_offset;
 			args[2] = LLVMConstInt(ctx->i32, (param * 4 + i + const_index) * 256, false);
-			args[3] = ctx->i32zero;
-			args[4] = ctx->i32one; /* OFFEN */
-			args[5] = ctx->i32zero; /* IDXEN */
-			args[6] = ctx->i32one; /* GLC */
-			args[7] = ctx->i32zero; /* SLC */
-			args[8] = ctx->i32zero; /* TFE */
+			args[3] = ctx->ac.i32_0;
+			args[4] = ctx->ac.i32_1; /* OFFEN */
+			args[5] = ctx->ac.i32_0; /* IDXEN */
+			args[6] = ctx->ac.i32_1; /* GLC */
+			args[7] = ctx->ac.i32_0; /* SLC */
+			args[8] = ctx->ac.i32_0; /* TFE */
 
 			value[i] = ac_build_intrinsic(&ctx->ac, "llvm.SI.buffer.load.dword.i32.i32",
 			                              ctx->i32, args, 9,
@@ -3943,8 +3935,8 @@ static LLVMValueRef visit_interp(struct nir_to_llvm_context *ctx,
 	}
 
 	if (instr->intrinsic == nir_intrinsic_interp_var_at_offset) {
-		src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->builder, src0, ctx->i32zero, ""));
-		src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->builder, src0, ctx->i32one, ""));
+		src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->builder, src0, ctx->ac.i32_0, ""));
+		src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->builder, src0, ctx->ac.i32_1, ""));
 	} else if (instr->intrinsic == nir_intrinsic_interp_var_at_sample) {
 		LLVMValueRef sample_position;
 		LLVMValueRef halfval = LLVMConstReal(ctx->f32, 0.5f);
@@ -3952,9 +3944,9 @@ static LLVMValueRef visit_interp(struct nir_to_llvm_context *ctx,
 		/* fetch sample ID */
 		sample_position = load_sample_position(ctx, src0);
 
-		src_c0 = LLVMBuildExtractElement(ctx->builder, sample_position, ctx->i32zero, "");
+		src_c0 = LLVMBuildExtractElement(ctx->builder, sample_position, ctx->ac.i32_0, "");
 		src_c0 = LLVMBuildFSub(ctx->builder, src_c0, halfval, "");
-		src_c1 = LLVMBuildExtractElement(ctx->builder, sample_position, ctx->i32one, "");
+		src_c1 = LLVMBuildExtractElement(ctx->builder, sample_position, ctx->ac.i32_1, "");
 		src_c1 = LLVMBuildFSub(ctx->builder, src_c1, halfval, "");
 	}
 	interp_param = lookup_interp_param(ctx, instr->variables[0]->var->data.interpolation, location);
@@ -4006,9 +3998,9 @@ static LLVMValueRef visit_interp(struct nir_to_llvm_context *ctx,
 			interp_param = LLVMBuildBitCast(ctx->builder,
 							interp_param, LLVMVectorType(ctx->f32, 2), "");
 			LLVMValueRef i = LLVMBuildExtractElement(
-				ctx->builder, interp_param, ctx->i32zero, "");
+				ctx->builder, interp_param, ctx->ac.i32_0, "");
 			LLVMValueRef j = LLVMBuildExtractElement(
-				ctx->builder, interp_param, ctx->i32one, "");
+				ctx->builder, interp_param, ctx->ac.i32_1, "");
 
 			result[chan] = ac_build_fs_interp(&ctx->ac,
 							  llvm_chan, attr_number,
@@ -4082,7 +4074,7 @@ visit_emit_vertex(struct nir_to_llvm_context *ctx,
 	}
 
 	gs_next_vertex = LLVMBuildAdd(ctx->builder, gs_next_vertex,
-				      ctx->i32one, "");
+				      ctx->ac.i32_1, "");
 	LLVMBuildStore(ctx->builder, gs_next_vertex, ctx->gs_next_vertex);
 
 	ac_build_sendmsg(&ctx->ac, AC_SENDMSG_GS_OP_EMIT | AC_SENDMSG_GS | (0 << 8), ctx->gs_wave_id);
@@ -4102,12 +4094,12 @@ visit_load_tess_coord(struct nir_to_llvm_context *ctx,
 	LLVMValueRef coord[4] = {
 		ctx->tes_u,
 		ctx->tes_v,
-		ctx->f32zero,
-		ctx->f32zero,
+		ctx->ac.f32_0,
+		ctx->ac.f32_0,
 	};
 
 	if (ctx->tes_primitive_mode == GL_TRIANGLES)
-		coord[2] = LLVMBuildFSub(ctx->builder, ctx->f32one,
+		coord[2] = LLVMBuildFSub(ctx->builder, ctx->ac.f32_1,
 					LLVMBuildFAdd(ctx->builder, coord[0], coord[1], ""), "");
 
 	LLVMValueRef result = ac_build_gather_values(&ctx->ac, coord, instr->num_components);
@@ -4385,7 +4377,7 @@ static LLVMValueRef radv_get_sampler_desc(struct ac_shader_abi *abi,
 	assert(stride % type_size == 0);
 
 	if (!index)
-		index = ctx->i32zero;
+		index = ctx->ac.i32_0;
 
 	index = LLVMBuildMul(builder, index, LLVMConstInt(ctx->i32, stride / type_size, 0), "");
 
@@ -5135,9 +5127,9 @@ static void interp_fs_input(struct nir_to_llvm_context *ctx,
 						LLVMVectorType(ctx->f32, 2), "");
 
 		i = LLVMBuildExtractElement(ctx->builder, interp_param,
-						ctx->i32zero, "");
+						ctx->ac.i32_0, "");
 		j = LLVMBuildExtractElement(ctx->builder, interp_param,
-						ctx->i32one, "");
+						ctx->ac.i32_1, "");
 	}
 
 	for (chan = 0; chan < 4; chan++) {
@@ -5257,7 +5249,7 @@ handle_fs_inputs(struct nir_to_llvm_context *ctx,
 			for(int i = 0; i < 3; ++i)
 				inputs[i] = ctx->abi.frag_pos[i];
 
-			inputs[3] = ac_build_fdiv(&ctx->ac, ctx->f32one,
+			inputs[3] = ac_build_fdiv(&ctx->ac, ctx->ac.f32_1,
 						  ctx->abi.frag_pos[3]);
 		}
 	}
@@ -5607,7 +5599,7 @@ si_llvm_init_export_args(struct nir_to_llvm_context *ctx,
 				val[chan] = LLVMBuildFAdd(ctx->builder, val[chan],
 						LLVMBuildSelect(ctx->builder,
 							LLVMBuildFCmp(ctx->builder, LLVMRealOGE,
-								val[chan], ctx->f32zero, ""),
+								val[chan], ctx->ac.f32_0, ""),
 							LLVMConstReal(ctx->f32, 0.5),
 							LLVMConstReal(ctx->f32, -0.5), ""), "");
 				val[chan] = LLVMBuildFPToSI(ctx->builder, val[chan], ctx->i32, "");
@@ -5639,7 +5631,7 @@ si_llvm_init_export_args(struct nir_to_llvm_context *ctx,
 							    is_int8 ? 127 : is_int10 ? 511 : 32767, 0);
 			LLVMValueRef min_rgb = LLVMConstInt(ctx->i32,
 							    is_int8 ? -128 : is_int10 ? -512 : -32768, 0);
-			LLVMValueRef max_alpha = !is_int10 ? max_rgb : ctx->i32one;
+			LLVMValueRef max_alpha = !is_int10 ? max_rgb : ctx->ac.i32_1;
 			LLVMValueRef min_alpha = !is_int10 ? min_rgb : LLVMConstInt(ctx->i32, -2, 0);
 
 			/* Clamp. */
@@ -5723,7 +5715,7 @@ handle_vs_outputs_post(struct nir_to_llvm_context *ctx,
 
 	}
 
-	LLVMValueRef pos_values[4] = {ctx->f32zero, ctx->f32zero, ctx->f32zero, ctx->f32one};
+	LLVMValueRef pos_values[4] = {ctx->ac.f32_0, ctx->ac.f32_0, ctx->ac.f32_0, ctx->ac.f32_1};
 	if (ctx->output_mask & (1ull << VARYING_SLOT_POS)) {
 		for (unsigned j = 0; j < 4; j++)
 			pos_values[j] = LLVMBuildLoad(ctx->builder,
@@ -5758,10 +5750,10 @@ handle_vs_outputs_post(struct nir_to_llvm_context *ctx,
 		pos_args[1].done = 0;
 		pos_args[1].target = V_008DFC_SQ_EXP_POS + 1;
 		pos_args[1].compr = 0;
-		pos_args[1].out[0] = ctx->f32zero; /* X */
-		pos_args[1].out[1] = ctx->f32zero; /* Y */
-		pos_args[1].out[2] = ctx->f32zero; /* Z */
-		pos_args[1].out[3] = ctx->f32zero;  /* W */
+		pos_args[1].out[0] = ctx->ac.f32_0; /* X */
+		pos_args[1].out[1] = ctx->ac.f32_0; /* Y */
+		pos_args[1].out[2] = ctx->ac.f32_0; /* Z */
+		pos_args[1].out[3] = ctx->ac.f32_0;  /* W */
 
 		if (outinfo->writes_pointsize == true)
 			pos_args[1].out[0] = psize_value;
@@ -5851,7 +5843,7 @@ handle_vs_outputs_post(struct nir_to_llvm_context *ctx,
 		ctx->shader_info->vs.vgpr_comp_cnt = MAX2(2,
 							  ctx->shader_info->vs.vgpr_comp_cnt);
 		for (unsigned j = 1; j < 4; j++)
-			values[j] = ctx->f32zero;
+			values[j] = ctx->ac.f32_0;
 		si_llvm_init_export_args(ctx, values, target, &args);
 		ac_build_export(&ctx->ac, &args);
 		outinfo->export_prim_id = true;
@@ -5925,7 +5917,7 @@ handle_es_outputs_post(struct nir_to_llvm_context *ctx,
 			if (ctx->ac.chip_class  >= GFX9) {
 				ac_lds_store(&ctx->ac, dw_addr,
 					     LLVMBuildLoad(ctx->builder, out_ptr[j], ""));
-				dw_addr = LLVMBuildAdd(ctx->builder, dw_addr, ctx->i32one, "");
+				dw_addr = LLVMBuildAdd(ctx->builder, dw_addr, ctx->ac.i32_1, "");
 			} else {
 				ac_build_buffer_store_dword(&ctx->ac,
 				                            ctx->esgs_ring,
@@ -5965,7 +5957,7 @@ handle_ls_outputs_post(struct nir_to_llvm_context *ctx)
 		for (unsigned j = 0; j < length; j++) {
 			ac_lds_store(&ctx->ac, dw_addr,
 				     LLVMBuildLoad(ctx->builder, out_ptr[j], ""));
-			dw_addr = LLVMBuildAdd(ctx->builder, dw_addr, ctx->i32one, "");
+			dw_addr = LLVMBuildAdd(ctx->builder, dw_addr, ctx->ac.i32_1, "");
 		}
 	}
 }
@@ -6096,7 +6088,7 @@ write_tess_factors(struct nir_to_llvm_context *ctx)
 
 	ac_nir_build_if(&if_ctx, ctx,
 			LLVMBuildICmp(ctx->builder, LLVMIntEQ,
-				      invocation_id, ctx->i32zero, ""));
+				      invocation_id, ctx->ac.i32_0, ""));
 
 	tess_inner_index = shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_INNER);
 	tess_outer_index = shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_OUTER);
@@ -6152,12 +6144,12 @@ write_tess_factors(struct nir_to_llvm_context *ctx)
 	if (ctx->options->chip_class <= VI) {
 		ac_nir_build_if(&inner_if_ctx, ctx,
 		                LLVMBuildICmp(ctx->builder, LLVMIntEQ,
-		                              rel_patch_id, ctx->i32zero, ""));
+		                              rel_patch_id, ctx->ac.i32_0, ""));
 
 		/* Store the dynamic HS control word. */
 		ac_build_buffer_store_dword(&ctx->ac, buffer,
 					    LLVMConstInt(ctx->i32, 0x80000000, false),
-					    1, ctx->i32zero, tf_base,
+					    1, ctx->ac.i32_0, tf_base,
 					    0, 1, 0, true, false);
 		tf_offset += 4;
 
@@ -6444,9 +6436,9 @@ ac_setup_rings(struct nir_to_llvm_context *ctx)
 		ctx->gsvs_ring = LLVMBuildBitCast(ctx->builder, ctx->gsvs_ring, ctx->v4i32, "");
 
 		ctx->gsvs_ring = LLVMBuildInsertElement(ctx->builder, ctx->gsvs_ring, ctx->gsvs_num_entries, LLVMConstInt(ctx->i32, 2, false), "");
-		tmp = LLVMBuildExtractElement(ctx->builder, ctx->gsvs_ring, ctx->i32one, "");
+		tmp = LLVMBuildExtractElement(ctx->builder, ctx->gsvs_ring, ctx->ac.i32_1, "");
 		tmp = LLVMBuildOr(ctx->builder, tmp, ctx->gsvs_ring_stride, "");
-		ctx->gsvs_ring = LLVMBuildInsertElement(ctx->builder, ctx->gsvs_ring, tmp, ctx->i32one, "");
+		ctx->gsvs_ring = LLVMBuildInsertElement(ctx->builder, ctx->gsvs_ring, tmp, ctx->ac.i32_1, "");
 	}
 
 	if (ctx->stage == MESA_SHADER_TESS_CTRL ||
@@ -6888,12 +6880,12 @@ ac_gs_copy_shader_emit(struct nir_to_llvm_context *ctx)
 	LLVMValueRef args[9];
 	args[0] = ctx->gsvs_ring;
 	args[1] = LLVMBuildMul(ctx->builder, ctx->abi.vertex_id, LLVMConstInt(ctx->i32, 4, false), "");
-	args[3] = ctx->i32zero;
-	args[4] = ctx->i32one;  /* OFFEN */
-	args[5] = ctx->i32zero; /* IDXEN */
-	args[6] = ctx->i32one;  /* GLC */
-	args[7] = ctx->i32one;  /* SLC */
-	args[8] = ctx->i32zero; /* TFE */
+	args[3] = ctx->ac.i32_0;
+	args[4] = ctx->ac.i32_1;  /* OFFEN */
+	args[5] = ctx->ac.i32_0; /* IDXEN */
+	args[6] = ctx->ac.i32_1;  /* GLC */
+	args[7] = ctx->ac.i32_1;  /* SLC */
+	args[8] = ctx->ac.i32_0; /* TFE */
 
 	int idx = 0;
 
-- 
2.9.5



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