[Mesa-dev] [PATCH 19/21] intel/nir: Use the correct indirect lowering masks in link_shaders

[Jason Ekstrand]

Previously, if we were linking a vec4 VS with a SIMD8/16 FS, we wouldn't
lower indirects on the fragment shader which is wrong.  Instead of using
a single indirect mask, take advantage of our new little helper.

Cc: mesa-stable at lists.freedesktop.org
---
 src/intel/compiler/brw_nir.c | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
index 9a085ea5..4d7d01a 100644
--- a/src/intel/compiler/brw_nir.c
+++ b/src/intel/compiler/brw_nir.c
@@ -677,16 +677,14 @@ brw_nir_link_shaders(const struct brw_compiler *compiler,
       NIR_PASS_V(*producer, nir_lower_global_vars_to_local);
       NIR_PASS_V(*consumer, nir_lower_global_vars_to_local);
 
-      nir_variable_mode indirect_mask = (nir_variable_mode) 0;
-      if (compiler->glsl_compiler_options[(*producer)->info.stage].EmitNoIndirectTemp)
-         indirect_mask = nir_var_local;
-
       /* The backend might not be able to handle indirects on
        * temporaries so we need to lower indirects on any of the
        * varyings we have demoted here.
        */
-      NIR_PASS_V(*producer, nir_lower_indirect_derefs, indirect_mask);
-      NIR_PASS_V(*consumer, nir_lower_indirect_derefs, indirect_mask);
+      NIR_PASS_V(*producer, nir_lower_indirect_derefs,
+                 brw_nir_no_indirect_mask(compiler, (*producer)->info.stage));
+      NIR_PASS_V(*consumer, nir_lower_indirect_derefs,
+                 brw_nir_no_indirect_mask(compiler, (*consumer)->info.stage));
 
       const bool p_is_scalar =
          compiler->scalar_stage[(*producer)->info.stage];
-- 
2.5.0.400.gff86faf