[Mesa-dev] [PATCH 2/3] radeonsi: add more state flags into si_state_dsa

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

3 flags for primitive binning, 2 flags for out-of-order rasterization
(but that will be done some other time)
---
 src/gallium/drivers/radeonsi/si_state.c | 17 +++++++++++++++++
 src/gallium/drivers/radeonsi/si_state.h |  7 ++++++-
 2 files changed, 23 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 2edd982..076b583 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -1037,20 +1037,28 @@ static uint32_t si_translate_stencil_op(int s_op)
 	case PIPE_STENCIL_OP_INVERT:
 		return V_02842C_STENCIL_INVERT;
 	default:
 		R600_ERR("Unknown stencil op %d", s_op);
 		assert(0);
 		break;
 	}
 	return 0;
 }
 
+static bool si_dsa_writes_stencil(const struct pipe_stencil_state *s)
+{
+	return s->enabled && s->writemask &&
+	       (s->fail_op  != PIPE_STENCIL_OP_KEEP ||
+		s->zfail_op != PIPE_STENCIL_OP_KEEP ||
+		s->zpass_op != PIPE_STENCIL_OP_KEEP);
+}
+
 static void *si_create_dsa_state(struct pipe_context *ctx,
 				 const struct pipe_depth_stencil_alpha_state *state)
 {
 	struct si_state_dsa *dsa = CALLOC_STRUCT(si_state_dsa);
 	struct si_pm4_state *pm4 = &dsa->pm4;
 	unsigned db_depth_control;
 	uint32_t db_stencil_control = 0;
 
 	if (!dsa) {
 		return NULL;
@@ -1094,20 +1102,29 @@ static void *si_create_dsa_state(struct pipe_context *ctx,
 	}
 
 	si_pm4_set_reg(pm4, R_028800_DB_DEPTH_CONTROL, db_depth_control);
 	if (state->stencil[0].enabled)
 		si_pm4_set_reg(pm4, R_02842C_DB_STENCIL_CONTROL, db_stencil_control);
 	if (state->depth.bounds_test) {
 		si_pm4_set_reg(pm4, R_028020_DB_DEPTH_BOUNDS_MIN, fui(state->depth.bounds_min));
 		si_pm4_set_reg(pm4, R_028024_DB_DEPTH_BOUNDS_MAX, fui(state->depth.bounds_max));
 	}
 
+	dsa->depth_enabled = state->depth.enabled;
+	dsa->depth_write_enabled = state->depth.enabled &&
+				   state->depth.writemask;
+	dsa->stencil_enabled = state->stencil[0].enabled;
+	dsa->stencil_write_enabled = state->stencil[0].enabled &&
+				     (si_dsa_writes_stencil(&state->stencil[0]) ||
+				      si_dsa_writes_stencil(&state->stencil[1]));
+	dsa->db_can_write = dsa->depth_write_enabled ||
+			    dsa->stencil_write_enabled;
 	return dsa;
 }
 
 static void si_bind_dsa_state(struct pipe_context *ctx, void *state)
 {
         struct si_context *sctx = (struct si_context *)ctx;
 	struct si_state_dsa *old_dsa = sctx->queued.named.dsa;
         struct si_state_dsa *dsa = state;
 
         if (!state)
diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h
index 7b7d96c..9770960 100644
--- a/src/gallium/drivers/radeonsi/si_state.h
+++ b/src/gallium/drivers/radeonsi/si_state.h
@@ -84,22 +84,27 @@ struct si_state_rasterizer {
 	unsigned		clip_halfz:1;
 };
 
 struct si_dsa_stencil_ref_part {
 	uint8_t			valuemask[2];
 	uint8_t			writemask[2];
 };
 
 struct si_state_dsa {
 	struct si_pm4_state		pm4;
-	unsigned			alpha_func;
 	struct si_dsa_stencil_ref_part	stencil_ref;
+	ubyte				alpha_func:3;
+	bool				depth_enabled:1;
+	bool				depth_write_enabled:1;
+	bool				stencil_enabled:1;
+	bool				stencil_write_enabled:1;
+	bool				db_can_write:1;
 };
 
 struct si_stencil_ref {
 	struct r600_atom		atom;
 	struct pipe_stencil_ref		state;
 	struct si_dsa_stencil_ref_part	dsa_part;
 };
 
 struct si_vertex_elements
 {
-- 
2.7.4