[Mesa-dev] [PATCH 1/2] radeonsi: enable out-of-order rasterization when possible on VI and GFX9 dGPUs

Dieter Nützel Dieter at nuetzel-hh.de
Thu Sep 7 13:20:30 UTC 2017


Am 07.09.2017 00:35, schrieb Marek Olšák:
> From: Marek Olšák <marek.olsak at amd.com>
> 
> ---
>  src/gallium/drivers/radeonsi/si_pipe.c          |   2 +
>  src/gallium/drivers/radeonsi/si_pipe.h          |   1 +
>  src/gallium/drivers/radeonsi/si_state.c         | 143 
> +++++++++++++++++++++++-
>  src/gallium/drivers/radeonsi/si_state.h         |  10 +-
>  src/gallium/drivers/radeonsi/si_state_shaders.c |   5 +
>  5 files changed, 156 insertions(+), 5 deletions(-)

I got sig faults/bus error after applying this on top of your (TCS) and 
other former devel stuff. Will try in the evening/to night 
alone/combinations to find the offender.
Even X restart do NOT work anylonger.

I had this applied on top of
6d9d6071ee (origin/master, origin/HEAD) llvmpipe, tgsi: hook up dx10 
gather4 opcode:

st-mesa-skip-draw-calls-with-pipe_draw_info-count-0.mbox (you)
st-glsl_to_tgsi-be-precise-about-merging-scopes.mbox (Nicolai)
glsl-fix-loop-analysis-of-loop-terminators.mbox (Timothy)
RadeonSI-Tessellation-shader-micro-optimizations.mbox (you)
fix_front_drawing.diff 1. version of
[Mesa-dev] [PATCH] mesa/st: Fix frontbuffer rendering regression 
(Thomas)

Greetings,
Dieter


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