[Mesa-dev] [PATCH 0/5] radeonsi: enable out-of-order rasterization
Bas Nieuwenhuizen
bas at basnieuwenhuizen.nl
Sat Sep 9 11:26:43 UTC 2017
Out of curiosity, don't SI and CIK also support the out of order bits?
Why only enable it on VI?
(and would enabling it on 1 SE chips hurt anything?)
On Sat, Sep 9, 2017 at 12:43 PM, Nicolai Hähnle <nhaehnle at gmail.com> wrote:
> Hi all,
>
> This is my attempt at restructuring the logic for out-of-order
> rasterization, including commutative blending cases. Tested on
> Tonga and Polaris so far.
>
> The series adds some new options:
>
> R600_DEBUG=nooutoforder --> disable entirely
>
> drirc options:
>
> radeonsi_assume_no_z_fights --> as the name says, assume that
> no geometry has equal Z values
>
> radeonsi_commutative_blend_add --> treat additive blending as
> commutative despite small, non-deterministic changes due to
> different rounding
>
> The whole series is here:
> https://cgit.freedesktop.org/~nh/mesa/log/?h=out-of-order
>
> Please review!
>
> Thanks,
> Nicolai
> --
> src/amd/common/ac_surface.c | 2 +
> src/amd/common/ac_surface.h | 1 +
> src/amd/vulkan/radv_device.c | 6 +-
> src/gallium/drivers/r600/evergreen_state.c | 2 +-
> src/gallium/drivers/r600/r600_blit.c | 2 +-
> src/gallium/drivers/r600/r600_state_common.c | 6 +-
> .../drivers/radeon/r600_pipe_common.c | 1 +
> .../drivers/radeon/r600_pipe_common.h | 6 +-
> src/gallium/drivers/radeon/r600_query.c | 3 +-
> src/gallium/drivers/radeon/r600_texture.c | 4 +-
> .../drivers/radeonsi/driinfo_radeonsi.h | 2 +
> src/gallium/drivers/radeonsi/si_blit.c | 2 +-
> src/gallium/drivers/radeonsi/si_pipe.c | 7 +
> src/gallium/drivers/radeonsi/si_pipe.h | 3 +
> src/gallium/drivers/radeonsi/si_state.c | 228 ++++++++++++++++-
> src/gallium/drivers/radeonsi/si_state.h | 29 ++-
> .../drivers/radeonsi/si_state_binning.c | 2 +-
> .../drivers/radeonsi/si_state_shaders.c | 7 +
> .../winsys/radeon/drm/radeon_drm_surface.c | 1 +
> src/util/xmlpool/t_options.h | 10 +
> 20 files changed, 300 insertions(+), 24 deletions(-)
>
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