[Mesa-dev] [PATCH 07/27] i965: Add shader cache support for vertex and fragment stages

[Matt Turner]

On 08/19, Jordan Justen wrote:
>From: Timothy Arceri <timothy.arceri at collabora.com>
>
>This enables the cache on vertex and fragment shaders only.
>
>[jordan.l.justen at intel.com: reword subject]
>[jordan.l.justen at intel.com: *_cached_program => brw_disk_cache_*_program]
>Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
>---
> src/mesa/drivers/dri/i965/brw_state_upload.c |  2 ++
> src/mesa/drivers/dri/i965/brw_vs.c           | 21 ++++++++++++++-------
> src/mesa/drivers/dri/i965/brw_wm.c           | 24 +++++++++++++++---------
> 3 files changed, 31 insertions(+), 16 deletions(-)
>
>diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
>index 1ae45ba2ac..140146970b 100644
>--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
>+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
>@@ -434,6 +434,8 @@ brw_upload_programs(struct brw_context *brw,
>          brw_upload_clip_prog(brw);
>          brw_upload_sf_prog(brw);
>       }
>+
>+      brw_disk_cache_write_program(brw);
>    } else if (pipeline == BRW_COMPUTE_PIPELINE) {
>       brw_upload_cs_prog(brw);
>    }
>diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c
>index 055ea9d742..7190fc4a65 100644
>--- a/src/mesa/drivers/dri/i965/brw_vs.c
>+++ b/src/mesa/drivers/dri/i965/brw_vs.c
>@@ -364,13 +364,20 @@ brw_upload_vs_prog(struct brw_context *brw)
>
>    brw_vs_populate_key(brw, &key);
>
>-   if (!brw_search_cache(&brw->cache, BRW_CACHE_VS_PROG,
>-			 &key, sizeof(key),
>-			 &brw->vs.base.prog_offset, &brw->vs.base.prog_data)) {
>-      bool success = brw_codegen_vs_prog(brw, vp, &key);
>-      (void) success;
>-      assert(success);

Please just mark success as UNUSED (or MAYBE_UNUSED if you like typing
or find UNUSED too confusing). Same thing below and in the next patch.
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