[Mesa-dev] [PATCH 2/2] radeonsi: reallocate if a non-sharable textures is being shared

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

---
 src/gallium/drivers/radeon/r600_texture.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index 26afc98..e9507c3 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -28,20 +28,21 @@
 #include "r600_cs.h"
 #include "r600_query.h"
 #include "util/u_format.h"
 #include "util/u_log.h"
 #include "util/u_memory.h"
 #include "util/u_pack_color.h"
 #include "util/u_surface.h"
 #include "os/os_time.h"
 #include <errno.h>
 #include <inttypes.h>
+#include "state_tracker/drm_driver.h"
 
 static void r600_texture_discard_cmask(struct r600_common_screen *rscreen,
 				       struct r600_texture *rtex);
 static enum radeon_surf_mode
 r600_choose_tiling(struct r600_common_screen *rscreen,
 		   const struct pipe_resource *templ);
 
 
 bool r600_prepare_for_dma_blit(struct r600_common_context *rctx,
 			       struct r600_texture *rdst,
@@ -598,27 +599,30 @@ static boolean r600_texture_get_handle(struct pipe_screen* screen,
 
 	if (resource->target != PIPE_BUFFER) {
 		/* This is not supported now, but it might be required for OpenCL
 		 * interop in the future.
 		 */
 		if (resource->nr_samples > 1 || rtex->is_depth)
 			return false;
 
 		/* Move a suballocated texture into a non-suballocated allocation. */
 		if (rscreen->ws->buffer_is_suballocated(res->buf) ||
-		    rtex->surface.tile_swizzle) {
+		    rtex->surface.tile_swizzle ||
+		    (rtex->resource.flags & RADEON_FLAG_NO_INTERPROCESS_SHARING &&
+		     whandle->type != DRM_API_HANDLE_TYPE_KMS)) {
 			assert(!res->b.is_shared);
 			r600_reallocate_texture_inplace(rctx, rtex,
 							PIPE_BIND_SHARED, false);
 			rctx->b.flush(&rctx->b, NULL, 0);
 			assert(res->b.b.bind & PIPE_BIND_SHARED);
 			assert(res->flags & RADEON_FLAG_NO_SUBALLOC);
+			assert(!(res->flags & RADEON_FLAG_NO_INTERPROCESS_SHARING));
 			assert(rtex->surface.tile_swizzle == 0);
 		}
 
 		/* Since shader image stores don't support DCC on VI,
 		 * disable it for external clients that want write
 		 * access.
 		 */
 		if (usage & PIPE_HANDLE_USAGE_WRITE && rtex->dcc_offset) {
 			if (r600_texture_disable_dcc(rctx, rtex))
 				update_metadata = true;
-- 
2.7.4