[Mesa-dev] [PATCH 02/11] tgsi: infer that DLDEXP's second source has an integer type
Nicolai Hähnle
nhaehnle at gmail.com
Sat Sep 16 11:23:44 UTC 2017
From: Nicolai Hähnle <nicolai.haehnle at amd.com>
---
src/gallium/auxiliary/gallivm/lp_bld_tgsi.c | 4 ++--
src/gallium/auxiliary/nir/tgsi_to_nir.c | 7 ++++---
src/gallium/auxiliary/tgsi/tgsi_info.c | 5 ++++-
src/gallium/auxiliary/tgsi/tgsi_info.h | 2 +-
4 files changed, 11 insertions(+), 7 deletions(-)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c b/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c
index c6b1dcbad30..e450092a82c 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c
@@ -195,21 +195,21 @@ void lp_build_fetch_args(
* - else for f2d, d.xy = s.x
* - else for f2d, d.zw = s.y
* 3. if dst is single, src is 64-bit
* - map dst x,z to src xy;
* - map dst y,w to src zw;
*/
static int get_src_chan_idx(unsigned opcode,
int dst_chan_index)
{
enum tgsi_opcode_type dtype = tgsi_opcode_infer_dst_type(opcode);
- enum tgsi_opcode_type stype = tgsi_opcode_infer_src_type(opcode);
+ enum tgsi_opcode_type stype = tgsi_opcode_infer_src_type(opcode, 0);
if (!tgsi_type_is_64bit(dtype) && !tgsi_type_is_64bit(stype))
return dst_chan_index;
if (tgsi_type_is_64bit(dtype)) {
if (dst_chan_index == 1 || dst_chan_index == 3)
return -1;
if (tgsi_type_is_64bit(stype))
return dst_chan_index;
if (dst_chan_index == 0)
return 0;
@@ -413,21 +413,21 @@ lp_build_emit_fetch_src(
LLVMValueRef
lp_build_emit_fetch(
struct lp_build_tgsi_context *bld_base,
const struct tgsi_full_instruction *inst,
unsigned src_op,
const unsigned chan_index)
{
const struct tgsi_full_src_register *reg = &inst->Src[src_op];
enum tgsi_opcode_type stype =
- tgsi_opcode_infer_src_type(inst->Instruction.Opcode);
+ tgsi_opcode_infer_src_type(inst->Instruction.Opcode, src_op);
return lp_build_emit_fetch_src(bld_base, reg, stype, chan_index);
}
LLVMValueRef
lp_build_emit_fetch_texoffset(
struct lp_build_tgsi_context *bld_base,
const struct tgsi_full_instruction *inst,
unsigned tex_off_op,
diff --git a/src/gallium/auxiliary/nir/tgsi_to_nir.c b/src/gallium/auxiliary/nir/tgsi_to_nir.c
index aa715dcae2d..e64e724550b 100644
--- a/src/gallium/auxiliary/nir/tgsi_to_nir.c
+++ b/src/gallium/auxiliary/nir/tgsi_to_nir.c
@@ -759,26 +759,27 @@ ttn_get_var(struct ttn_compile *c, struct tgsi_full_dst_register *tgsi_fdst)
/* we should not have an indirect when there is no var! */
if (!c->temp_regs[index].var)
assert(!tgsi_dst->Indirect);
return c->temp_regs[index].var;
}
return NULL;
}
static nir_ssa_def *
-ttn_get_src(struct ttn_compile *c, struct tgsi_full_src_register *tgsi_fsrc)
+ttn_get_src(struct ttn_compile *c, struct tgsi_full_src_register *tgsi_fsrc,
+ int src_idx)
{
nir_builder *b = &c->build;
struct tgsi_src_register *tgsi_src = &tgsi_fsrc->Register;
unsigned tgsi_opcode = c->token->FullInstruction.Instruction.Opcode;
- unsigned tgsi_src_type = tgsi_opcode_infer_src_type(tgsi_opcode);
+ unsigned tgsi_src_type = tgsi_opcode_infer_src_type(tgsi_opcode, src_idx);
bool src_is_float = !(tgsi_src_type == TGSI_TYPE_SIGNED ||
tgsi_src_type == TGSI_TYPE_UNSIGNED);
nir_alu_src src;
memset(&src, 0, sizeof(src));
if (tgsi_src->File == TGSI_FILE_NULL) {
return nir_imm_float(b, 0.0);
} else if (tgsi_src->File == TGSI_FILE_SAMPLER) {
/* Only the index of the sampler gets used in texturing, and it will
@@ -1636,21 +1637,21 @@ ttn_emit_instruction(struct ttn_compile *c)
struct tgsi_full_instruction *tgsi_inst = &c->token->FullInstruction;
unsigned i;
unsigned tgsi_op = tgsi_inst->Instruction.Opcode;
struct tgsi_full_dst_register *tgsi_dst = &tgsi_inst->Dst[0];
if (tgsi_op == TGSI_OPCODE_END)
return;
nir_ssa_def *src[TGSI_FULL_MAX_SRC_REGISTERS];
for (i = 0; i < tgsi_inst->Instruction.NumSrcRegs; i++) {
- src[i] = ttn_get_src(c, &tgsi_inst->Src[i]);
+ src[i] = ttn_get_src(c, &tgsi_inst->Src[i], i);
}
nir_alu_dest dest = ttn_get_dest(c, tgsi_dst);
switch (tgsi_op) {
case TGSI_OPCODE_RSQ:
ttn_move_dest(b, dest, nir_frsq(b, ttn_channel(b, src[0], X)));
break;
case TGSI_OPCODE_SQRT:
ttn_move_dest(b, dest, nir_fsqrt(b, ttn_channel(b, src[0], X)));
diff --git a/src/gallium/auxiliary/tgsi/tgsi_info.c b/src/gallium/auxiliary/tgsi/tgsi_info.c
index 08bce6380c9..36be463dc84 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_info.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_info.c
@@ -235,22 +235,25 @@ tgsi_opcode_infer_type( uint opcode )
return TGSI_TYPE_SIGNED64;
default:
return TGSI_TYPE_FLOAT;
}
}
/*
* infer the source type of a TGSI opcode.
*/
enum tgsi_opcode_type
-tgsi_opcode_infer_src_type( uint opcode )
+tgsi_opcode_infer_src_type(uint opcode, uint src_idx)
{
+ if (src_idx == 1 && opcode == TGSI_OPCODE_DLDEXP)
+ return TGSI_TYPE_SIGNED;
+
switch (opcode) {
case TGSI_OPCODE_UIF:
case TGSI_OPCODE_TXF:
case TGSI_OPCODE_TXF_LZ:
case TGSI_OPCODE_U2F:
case TGSI_OPCODE_U2D:
case TGSI_OPCODE_UADD:
case TGSI_OPCODE_SWITCH:
case TGSI_OPCODE_CASE:
case TGSI_OPCODE_SAMPLE_I:
diff --git a/src/gallium/auxiliary/tgsi/tgsi_info.h b/src/gallium/auxiliary/tgsi/tgsi_info.h
index 74bff186924..f3ef46fb4a8 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_info.h
+++ b/src/gallium/auxiliary/tgsi/tgsi_info.h
@@ -104,20 +104,20 @@ enum tgsi_opcode_type {
static inline bool tgsi_type_is_64bit(enum tgsi_opcode_type type)
{
if (type == TGSI_TYPE_DOUBLE || type == TGSI_TYPE_UNSIGNED64 ||
type == TGSI_TYPE_SIGNED64)
return true;
return false;
}
enum tgsi_opcode_type
-tgsi_opcode_infer_src_type( uint opcode );
+tgsi_opcode_infer_src_type( uint opcode, uint src_idx );
enum tgsi_opcode_type
tgsi_opcode_infer_dst_type( uint opcode );
#if defined __cplusplus
}
#endif
#endif /* TGSI_INFO_H */
--
2.11.0
More information about the mesa-dev
mailing list