[Mesa-dev] [PATCH 11/14] st/va/postproc: use progressive target buffer for scaling
Leo Liu
leo.liu at amd.com
Tue Sep 19 19:05:02 UTC 2017
Scaling between interlaced buffers, esp. for scale-up, because
blit will scale up top filed and bottom field separately. it'll
result in the weaving for these buffer with lack of accuracy.
So use shader deint for the case.
---
src/gallium/state_trackers/va/postproc.c | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/src/gallium/state_trackers/va/postproc.c b/src/gallium/state_trackers/va/postproc.c
index 63e2c3b..d99fc78 100644
--- a/src/gallium/state_trackers/va/postproc.c
+++ b/src/gallium/state_trackers/va/postproc.c
@@ -118,15 +118,33 @@ static VAStatus vlVaPostProcBlit(vlVaDriver *drv, vlVaContext *context,
struct pipe_surface **dst_surfaces;
struct u_rect src_rect;
struct u_rect dst_rect;
+ bool scale = false;
unsigned i;
if (src->interlaced != dst->interlaced && dst->interlaced)
return VA_STATUS_ERROR_INVALID_SURFACE;
+ if ((src->width != dst->width || src->height != dst->height) &&
+ (src->interlaced && dst->interlaced))
+ scale = true;
+
src_surfaces = src->get_surfaces(src);
if (!src_surfaces || !src_surfaces[0])
return VA_STATUS_ERROR_INVALID_SURFACE;
+ if (scale) {
+ vlVaSurface *surf;
+
+ surf = handle_table_get(drv->htab, context->target_id);
+ surf->templat.interlaced = false;
+ dst->destroy(dst);
+
+ if (vlVaHandleSurfaceAllocate(drv, surf, &surf->templat) != VA_STATUS_SUCCESS)
+ return VA_STATUS_ERROR_ALLOCATION_FAILED;
+
+ dst = context->target = surf->buffer;
+ }
+
dst_surfaces = dst->get_surfaces(dst);
if (!dst_surfaces || !dst_surfaces[0])
return VA_STATUS_ERROR_INVALID_SURFACE;
--
2.7.4
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