[Mesa-dev] [PATCH 00/11] Gallium/RadeonSI: Allow any 1D register as a TGSI address operand

[Marek Olšák]

On Fri, Sep 29, 2017 at 3:33 PM, Gert Wollny <gw.fossdev at gmail.com> wrote:
>
> Am 29.09.2017 14:51 schrieb "Marek Olšák" <maraeo at gmail.com>:
>
>>
>> If all requirements are met, UARL isn't emitted and the source operand
>> of UARL is folded into the instruction where ADDR would normally be
>> used.
> I only skimmed over the patches, but this will need tracking  reladdr* in
> the temporary register  lifetime estimation that is called by
> merge_registers, which is not yet done (unless I missed a patch in the last
> few days or I didn't see it in this set).
>
> AFAIR radeonsi doesn't use it, but at least r600g does, for which you also
> enabled this new behaviour.
>
> On Monday I can have a closer look at it.

This is only enabled for radeonsi, not r600g.

Marek