[Mesa-dev] [PATCH 31/55] radeonsi: switch radeon_add_to_buffer_list parameter to si_context
Marek Olšák
maraeo at gmail.com
Mon Apr 2 04:08:24 UTC 2018
From: Marek Olšák <marek.olsak at amd.com>
---
src/gallium/drivers/radeon/r600_cs.h | 6 +++---
src/gallium/drivers/radeon/r600_query.c | 6 +++---
src/gallium/drivers/radeonsi/si_compute.c | 14 +++++++-------
src/gallium/drivers/radeonsi/si_cp_dma.c | 4 ++--
src/gallium/drivers/radeonsi/si_descriptors.c | 16 ++++++++--------
src/gallium/drivers/radeonsi/si_dma_cs.c | 4 ++--
src/gallium/drivers/radeonsi/si_fence.c | 8 ++++----
src/gallium/drivers/radeonsi/si_gfx_cs.c | 2 +-
src/gallium/drivers/radeonsi/si_perfcounter.c | 2 +-
src/gallium/drivers/radeonsi/si_pm4.c | 4 ++--
src/gallium/drivers/radeonsi/si_state.c | 8 ++++----
src/gallium/drivers/radeonsi/si_state_draw.c | 8 ++++----
src/gallium/drivers/radeonsi/si_state_shaders.c | 2 +-
src/gallium/drivers/radeonsi/si_state_streamout.c | 4 ++--
14 files changed, 44 insertions(+), 44 deletions(-)
diff --git a/src/gallium/drivers/radeon/r600_cs.h b/src/gallium/drivers/radeon/r600_cs.h
index c90f06b..b0610f2 100644
--- a/src/gallium/drivers/radeon/r600_cs.h
+++ b/src/gallium/drivers/radeon/r600_cs.h
@@ -64,14 +64,14 @@ radeon_cs_memory_below_limit(struct si_screen *screen,
* The buffer list becomes empty after every context flush and must be
* rebuilt.
*/
-static inline void radeon_add_to_buffer_list(struct r600_common_context *rctx,
+static inline void radeon_add_to_buffer_list(struct si_context *sctx,
struct radeon_winsys_cs *cs,
struct r600_resource *rbo,
enum radeon_bo_usage usage,
enum radeon_bo_priority priority)
{
assert(usage);
- rctx->ws->cs_add_buffer(
+ sctx->b.ws->cs_add_buffer(
cs, rbo->buf,
(enum radeon_bo_usage)(usage | RADEON_USAGE_SYNCHRONIZED),
rbo->domains, priority);
@@ -107,7 +107,7 @@ radeon_add_to_gfx_buffer_list_check_mem(struct si_context *sctx,
sctx->b.gtt + rbo->gart_usage))
si_flush_gfx_cs(sctx, PIPE_FLUSH_ASYNC, NULL);
- radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs, rbo, usage, priority);
+ radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs, rbo, usage, priority);
}
static inline void radeon_set_config_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num)
diff --git a/src/gallium/drivers/radeon/r600_query.c b/src/gallium/drivers/radeon/r600_query.c
index 3348e75..cf34a42 100644
--- a/src/gallium/drivers/radeon/r600_query.c
+++ b/src/gallium/drivers/radeon/r600_query.c
@@ -786,7 +786,7 @@ static void r600_query_hw_do_emit_start(struct si_context *sctx,
default:
assert(0);
}
- radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs, query->buffer.buf, RADEON_USAGE_WRITE,
+ radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs, query->buffer.buf, RADEON_USAGE_WRITE,
RADEON_PRIO_QUERY);
}
@@ -878,7 +878,7 @@ static void r600_query_hw_do_emit_stop(struct si_context *sctx,
default:
assert(0);
}
- radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs, query->buffer.buf, RADEON_USAGE_WRITE,
+ radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs, query->buffer.buf, RADEON_USAGE_WRITE,
RADEON_PRIO_QUERY);
if (fence_va)
@@ -930,7 +930,7 @@ static void emit_set_predicate(struct si_context *ctx,
radeon_emit(cs, va);
radeon_emit(cs, op | ((va >> 32) & 0xFF));
}
- radeon_add_to_buffer_list(&ctx->b, ctx->b.gfx_cs, buf, RADEON_USAGE_READ,
+ radeon_add_to_buffer_list(ctx, ctx->b.gfx_cs, buf, RADEON_USAGE_READ,
RADEON_PRIO_QUERY);
}
diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c
index 5b60742..9b75006 100644
--- a/src/gallium/drivers/radeonsi/si_compute.c
+++ b/src/gallium/drivers/radeonsi/si_compute.c
@@ -438,7 +438,7 @@ static bool si_switch_compute_shader(struct si_context *sctx,
config->scratch_bytes_per_wave *
sctx->scratch_waves);
- radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs,
+ radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs,
shader->scratch_bo, RADEON_USAGE_READWRITE,
RADEON_PRIO_SCRATCH_BUFFER);
}
@@ -462,7 +462,7 @@ static bool si_switch_compute_shader(struct si_context *sctx,
shader_va += sizeof(amd_kernel_code_t);
}
- radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs, shader->bo,
+ radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs, shader->bo,
RADEON_USAGE_READ, RADEON_PRIO_SHADER_BINARY);
radeon_set_sh_reg_seq(cs, R_00B830_COMPUTE_PGM_LO, 2);
@@ -586,7 +586,7 @@ static void si_setup_user_sgprs_co_v2(struct si_context *sctx,
fprintf(stderr, "Error: Failed to allocate dispatch "
"packet.");
}
- radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs, dispatch_buf,
+ radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs, dispatch_buf,
RADEON_USAGE_READ, RADEON_PRIO_CONST_BUFFER);
dispatch_va = dispatch_buf->gpu_address + dispatch_offset;
@@ -669,7 +669,7 @@ static bool si_upload_compute_input(struct si_context *sctx,
}
- radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs, input_buffer,
+ radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs, input_buffer,
RADEON_USAGE_READ, RADEON_PRIO_CONST_BUFFER);
if (code_object) {
@@ -703,7 +703,7 @@ static void si_setup_tgsi_grid(struct si_context *sctx,
uint64_t va = base_va + info->indirect_offset;
int i;
- radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs,
+ radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs,
(struct r600_resource *)info->indirect,
RADEON_USAGE_READ, RADEON_PRIO_DRAW_INDIRECT);
@@ -774,7 +774,7 @@ static void si_emit_dispatch_packets(struct si_context *sctx,
if (info->indirect) {
uint64_t base_va = r600_resource(info->indirect)->gpu_address;
- radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs,
+ radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs,
(struct r600_resource *)info->indirect,
RADEON_USAGE_READ, RADEON_PRIO_DRAW_INDIRECT);
@@ -883,7 +883,7 @@ static void si_launch_grid(
if (!buffer) {
continue;
}
- radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs, buffer,
+ radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs, buffer,
RADEON_USAGE_READWRITE,
RADEON_PRIO_COMPUTE_GLOBAL);
}
diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c b/src/gallium/drivers/radeonsi/si_cp_dma.c
index dda6cef..c68f785 100644
--- a/src/gallium/drivers/radeonsi/si_cp_dma.c
+++ b/src/gallium/drivers/radeonsi/si_cp_dma.c
@@ -175,11 +175,11 @@ static void si_cp_dma_prepare(struct si_context *sctx, struct pipe_resource *dst
/* This must be done after need_cs_space. */
if (!(user_flags & SI_CPDMA_SKIP_BO_LIST_UPDATE)) {
- radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs,
+ radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs,
(struct r600_resource*)dst,
RADEON_USAGE_WRITE, RADEON_PRIO_CP_DMA);
if (src)
- radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs,
+ radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs,
(struct r600_resource*)src,
RADEON_USAGE_READ, RADEON_PRIO_CP_DMA);
}
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index a8ebced..beafc5c 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -181,7 +181,7 @@ static bool si_upload_descriptors(struct si_context *sctx,
upload_size);
desc->gpu_list = ptr - first_slot_offset / 4;
- radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs, desc->buffer,
+ radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs, desc->buffer,
RADEON_USAGE_READ, RADEON_PRIO_DESCRIPTORS);
/* The shader pointer should point to slot 0. */
@@ -202,7 +202,7 @@ si_descriptors_begin_new_cs(struct si_context *sctx, struct si_descriptors *desc
if (!desc->buffer)
return;
- radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs, desc->buffer,
+ radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs, desc->buffer,
RADEON_USAGE_READ, RADEON_PRIO_DESCRIPTORS);
}
@@ -959,7 +959,7 @@ static void si_buffer_resources_begin_new_cs(struct si_context *sctx,
while (mask) {
int i = u_bit_scan(&mask);
- radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs,
+ radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs,
r600_resource(buffers->buffers[i]),
i < SI_NUM_SHADER_BUFFERS ? buffers->shader_usage :
buffers->shader_usage_constbuf,
@@ -1004,14 +1004,14 @@ static void si_vertex_buffers_begin_new_cs(struct si_context *sctx)
if (!sctx->vertex_buffer[vb].buffer.resource)
continue;
- radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs,
+ radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs,
(struct r600_resource*)sctx->vertex_buffer[vb].buffer.resource,
RADEON_USAGE_READ, RADEON_PRIO_VERTEX_BUFFER);
}
if (!sctx->vb_descriptors_buffer)
return;
- radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs,
+ radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs,
sctx->vb_descriptors_buffer, RADEON_USAGE_READ,
RADEON_PRIO_DESCRIPTORS);
}
@@ -1052,7 +1052,7 @@ bool si_upload_vertex_buffer_descriptors(struct si_context *sctx)
}
sctx->vb_descriptors_gpu_list = ptr;
- radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs,
+ radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs,
sctx->vb_descriptors_buffer, RADEON_USAGE_READ,
RADEON_PRIO_DESCRIPTORS);
@@ -1090,7 +1090,7 @@ bool si_upload_vertex_buffer_descriptors(struct si_context *sctx)
desc[3] = velems->rsrc_word3[i];
if (first_vb_use_mask & (1 << i)) {
- radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs,
+ radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs,
(struct r600_resource*)vb->buffer.resource,
RADEON_USAGE_READ, RADEON_PRIO_VERTEX_BUFFER);
}
@@ -1402,7 +1402,7 @@ void si_set_ring_buffer(struct pipe_context *ctx, uint slot,
desc[3] |= S_008F0C_ELEMENT_SIZE(element_size);
pipe_resource_reference(&buffers->buffers[slot], buffer);
- radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs,
+ radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs,
(struct r600_resource*)buffer,
buffers->shader_usage, buffers->priority);
buffers->enabled_mask |= 1u << slot;
diff --git a/src/gallium/drivers/radeonsi/si_dma_cs.c b/src/gallium/drivers/radeonsi/si_dma_cs.c
index 91e4e87..1128b21 100644
--- a/src/gallium/drivers/radeonsi/si_dma_cs.c
+++ b/src/gallium/drivers/radeonsi/si_dma_cs.c
@@ -92,12 +92,12 @@ void si_need_dma_space(struct si_context *ctx, unsigned num_dw,
si_dma_emit_wait_idle(ctx);
if (dst) {
- radeon_add_to_buffer_list(&ctx->b, ctx->b.dma_cs, dst,
+ radeon_add_to_buffer_list(ctx, ctx->b.dma_cs, dst,
RADEON_USAGE_WRITE,
RADEON_PRIO_SDMA_BUFFER);
}
if (src) {
- radeon_add_to_buffer_list(&ctx->b, ctx->b.dma_cs, src,
+ radeon_add_to_buffer_list(ctx, ctx->b.dma_cs, src,
RADEON_USAGE_READ,
RADEON_PRIO_SDMA_BUFFER);
}
diff --git a/src/gallium/drivers/radeonsi/si_fence.c b/src/gallium/drivers/radeonsi/si_fence.c
index 6d79fc6..fc78cd8 100644
--- a/src/gallium/drivers/radeonsi/si_fence.c
+++ b/src/gallium/drivers/radeonsi/si_fence.c
@@ -102,7 +102,7 @@ void si_gfx_write_event_eop(struct si_context *ctx,
radeon_emit(cs, scratch->gpu_address);
radeon_emit(cs, scratch->gpu_address >> 32);
- radeon_add_to_buffer_list(&ctx->b, ctx->b.gfx_cs, scratch,
+ radeon_add_to_buffer_list(ctx, ctx->b.gfx_cs, scratch,
RADEON_USAGE_WRITE, RADEON_PRIO_QUERY);
}
@@ -131,7 +131,7 @@ void si_gfx_write_event_eop(struct si_context *ctx,
radeon_emit(cs, 0); /* immediate data */
radeon_emit(cs, 0); /* unused */
- radeon_add_to_buffer_list(&ctx->b, ctx->b.gfx_cs, scratch,
+ radeon_add_to_buffer_list(ctx, ctx->b.gfx_cs, scratch,
RADEON_USAGE_WRITE, RADEON_PRIO_QUERY);
}
@@ -144,7 +144,7 @@ void si_gfx_write_event_eop(struct si_context *ctx,
}
if (buf) {
- radeon_add_to_buffer_list(&ctx->b, ctx->b.gfx_cs, buf, RADEON_USAGE_WRITE,
+ radeon_add_to_buffer_list(ctx, ctx->b.gfx_cs, buf, RADEON_USAGE_WRITE,
RADEON_PRIO_QUERY);
}
}
@@ -263,7 +263,7 @@ static void si_fine_fence_set(struct si_context *ctx,
uint64_t fence_va = fine->buf->gpu_address + fine->offset;
- radeon_add_to_buffer_list(&ctx->b, ctx->b.gfx_cs, fine->buf,
+ radeon_add_to_buffer_list(ctx, ctx->b.gfx_cs, fine->buf,
RADEON_USAGE_WRITE, RADEON_PRIO_QUERY);
if (flags & PIPE_FLUSH_TOP_OF_PIPE) {
struct radeon_winsys_cs *cs = ctx->b.gfx_cs;
diff --git a/src/gallium/drivers/radeonsi/si_gfx_cs.c b/src/gallium/drivers/radeonsi/si_gfx_cs.c
index e1b0d97..60a1c73 100644
--- a/src/gallium/drivers/radeonsi/si_gfx_cs.c
+++ b/src/gallium/drivers/radeonsi/si_gfx_cs.c
@@ -171,7 +171,7 @@ static void si_begin_gfx_cs_debug(struct si_context *ctx)
si_trace_emit(ctx);
- radeon_add_to_buffer_list(&ctx->b, ctx->b.gfx_cs, ctx->current_saved_cs->trace_buf,
+ radeon_add_to_buffer_list(ctx, ctx->b.gfx_cs, ctx->current_saved_cs->trace_buf,
RADEON_USAGE_READWRITE, RADEON_PRIO_TRACE);
}
diff --git a/src/gallium/drivers/radeonsi/si_perfcounter.c b/src/gallium/drivers/radeonsi/si_perfcounter.c
index 86cf1f6..8575b8a 100644
--- a/src/gallium/drivers/radeonsi/si_perfcounter.c
+++ b/src/gallium/drivers/radeonsi/si_perfcounter.c
@@ -555,7 +555,7 @@ static void si_pc_emit_start(struct si_context *sctx,
{
struct radeon_winsys_cs *cs = sctx->b.gfx_cs;
- radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs, buffer,
+ radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs, buffer,
RADEON_USAGE_WRITE, RADEON_PRIO_QUERY);
radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, 0));
diff --git a/src/gallium/drivers/radeonsi/si_pm4.c b/src/gallium/drivers/radeonsi/si_pm4.c
index 0705b99..73c8f31 100644
--- a/src/gallium/drivers/radeonsi/si_pm4.c
+++ b/src/gallium/drivers/radeonsi/si_pm4.c
@@ -126,7 +126,7 @@ void si_pm4_emit(struct si_context *sctx, struct si_pm4_state *state)
struct radeon_winsys_cs *cs = sctx->b.gfx_cs;
for (int i = 0; i < state->nbo; ++i) {
- radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs, state->bo[i],
+ radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs, state->bo[i],
state->bo_usage[i], state->bo_priority[i]);
}
@@ -135,7 +135,7 @@ void si_pm4_emit(struct si_context *sctx, struct si_pm4_state *state)
} else {
struct r600_resource *ib = state->indirect_buffer;
- radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs, ib,
+ radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs, ib,
RADEON_USAGE_READ,
RADEON_PRIO_IB2);
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 989b468..529760d 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -2980,20 +2980,20 @@ static void si_emit_framebuffer_state(struct si_context *sctx, struct r600_atom
}
tex = (struct r600_texture *)cb->base.texture;
- radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs,
+ radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs,
&tex->resource, RADEON_USAGE_READWRITE,
tex->resource.b.b.nr_samples > 1 ?
RADEON_PRIO_COLOR_BUFFER_MSAA :
RADEON_PRIO_COLOR_BUFFER);
if (tex->cmask_buffer && tex->cmask_buffer != &tex->resource) {
- radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs,
+ radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs,
tex->cmask_buffer, RADEON_USAGE_READWRITE,
RADEON_PRIO_CMASK);
}
if (tex->dcc_separate_buffer)
- radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs,
+ radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs,
tex->dcc_separate_buffer,
RADEON_USAGE_READWRITE,
RADEON_PRIO_DCC);
@@ -3130,7 +3130,7 @@ static void si_emit_framebuffer_state(struct si_context *sctx, struct r600_atom
struct r600_surface *zb = (struct r600_surface*)state->zsbuf;
struct r600_texture *rtex = (struct r600_texture*)zb->base.texture;
- radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs,
+ radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs,
&rtex->resource, RADEON_USAGE_READWRITE,
zb->base.texture->nr_samples > 1 ?
RADEON_PRIO_DEPTH_BUFFER_MSAA :
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index fc17eec..5f149e3 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -674,7 +674,7 @@ static void si_emit_draw_packets(struct si_context *sctx,
radeon_emit(cs, R_028B2C_VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE >> 2);
radeon_emit(cs, 0); /* unused */
- radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs,
+ radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs,
t->buf_filled_size, RADEON_USAGE_READ,
RADEON_PRIO_SO_FILLED_SIZE);
}
@@ -719,7 +719,7 @@ static void si_emit_draw_packets(struct si_context *sctx,
index_size;
index_va = r600_resource(indexbuf)->gpu_address + index_offset;
- radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs,
+ radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs,
(struct r600_resource *)indexbuf,
RADEON_USAGE_READ, RADEON_PRIO_INDEX_BUFFER);
} else {
@@ -742,7 +742,7 @@ static void si_emit_draw_packets(struct si_context *sctx,
radeon_emit(cs, indirect_va);
radeon_emit(cs, indirect_va >> 32);
- radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs,
+ radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs,
(struct r600_resource *)indirect->buffer,
RADEON_USAGE_READ, RADEON_PRIO_DRAW_INDIRECT);
@@ -776,7 +776,7 @@ static void si_emit_draw_packets(struct si_context *sctx,
(struct r600_resource *)indirect->indirect_draw_count;
radeon_add_to_buffer_list(
- &sctx->b, sctx->b.gfx_cs, params_buf,
+ sctx, sctx->b.gfx_cs, params_buf,
RADEON_USAGE_READ, RADEON_PRIO_DRAW_INDIRECT);
count_va = params_buf->gpu_address + indirect->indirect_draw_count_offset;
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
index e333cdc..bcb3ab4 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -3320,7 +3320,7 @@ static void si_emit_scratch_state(struct si_context *sctx,
sctx->spi_tmpring_size);
if (sctx->scratch_buffer) {
- radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs,
+ radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs,
sctx->scratch_buffer, RADEON_USAGE_READWRITE,
RADEON_PRIO_SCRATCH_BUFFER);
}
diff --git a/src/gallium/drivers/radeonsi/si_state_streamout.c b/src/gallium/drivers/radeonsi/si_state_streamout.c
index 2b5b6ec..6e25fd9 100644
--- a/src/gallium/drivers/radeonsi/si_state_streamout.c
+++ b/src/gallium/drivers/radeonsi/si_state_streamout.c
@@ -291,7 +291,7 @@ static void si_emit_streamout_begin(struct si_context *sctx, struct r600_atom *a
radeon_emit(cs, va); /* src address lo */
radeon_emit(cs, va >> 32); /* src address hi */
- radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs,
+ radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs,
t[i]->buf_filled_size,
RADEON_USAGE_READ,
RADEON_PRIO_SO_FILLED_SIZE);
@@ -333,7 +333,7 @@ void si_emit_streamout_end(struct si_context *sctx)
radeon_emit(cs, 0); /* unused */
radeon_emit(cs, 0); /* unused */
- radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs,
+ radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs,
t[i]->buf_filled_size,
RADEON_USAGE_WRITE,
RADEON_PRIO_SO_FILLED_SIZE);
--
2.7.4
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