[Mesa-dev] [PATCH] radeonsi: correct si_vgt_param_key on big endian machines

Gert Wollny gw.fossdev at gmail.com
Tue Apr 10 06:38:37 UTC 2018


Am Montag, den 09.04.2018, 17:26 -0400 schrieb Marek Olšák:
> On Mon, Apr 9, 2018 at 5:19 PM, Gert Wollny <gw.fossdev at gmail.com>
> wrote:
> > 
> > 
> > There is another option: Check at configuration time whether the
> > bit field layout is like the low or the high endian layout you
> > already implemented, and instead of basing the selection of the
> > struct layout on the big/low-endianess of the architecture, base it
> > on this test.
> > 
> > It would probably be prudent to test both layouts and then fail
> > configuration if non of the two reflect the actual layout (at which
> > point one would have to thing about how to implement all the bit
> > shifting properly).
> > 
> > > >
> > > > Which would you prefer?
> > > >
> > >
> > > I don't mind bitfields. They make the code nice and tiny. Shifts
> > > would decrease readability.
> > The problem is, that the layout of bitfields is compiler dependend.
> 
> We can fix it after we discover that it's a real problem on a
> compiler we care about.
> 
I don't think it is a good idea to rely on undefined behaviour, but if
it is done, then the least one can do is to add a test that flags an
upcoming problem before it can do any damage; one example how to do
this I described above, another approach would be to add a unit test.

Best, 
Gert



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