[Mesa-dev] [PATCH] radeonsi: correct si_vgt_param_key on big endian machines

[Michel Dänzer]

On 2018-04-10 10:03 AM, Bas Vermeulen wrote:
> On Mon, Apr 9, 2018 at 11:19 PM, Gert Wollny <gw.fossdev at gmail.com> wrote:
>> Am Montag, den 09.04.2018, 14:03 -0400 schrieb Marek Olšák:
>>> On Mon, Apr 9, 2018 at 10:51 AM, Bas Vermeulen <bas at daedalean.ai>
> 
>> There is another option: Check at configuration time whether the bit
>> field layout is like the low or the high endian layout you already
>> implemented, and instead of basing the selection of the struct layout
>> on the big/low-endianess of the architecture, base it on this test.
>>
>> It would probably be prudent to test both layouts and then fail
>> configuration if non of the two reflect the actual layout (at which
>> point one would have to thing about how to implement all the bit
>> shifting properly).
> 
> Or just keep the union dependent on endianness, and add an assert/check/test
> to make sure that everything works as expected.

Again, it's nothing to do with endianness — the CPU always accesses the
union in its native byte order.

The issue is that the C standard doesn't define the memory layout of
bit-fields, and the Linux powerpc architecture uses a different layout
than x86.


-- 
Earthling Michel Dänzer               |               http://www.amd.com
Libre software enthusiast             |             Mesa and X developer