[Mesa-dev] [PATCH 0/5] amd/common: use dimension-aware image intrinsics for LLVM

Nicolai Hähnle nhaehnle at gmail.com
Wed Apr 11 11:13:52 UTC 2018


Hi all,

one of the things I've been recently working on is a new set of image
intrinsics in LLVM to have explicit parameters for all the different
components of the address argument.

This is motivated by the A16 feature in gfx9, which allows address
components (coordinates, explicit derivatives) to be passed in as
16-bit values. This feature cannot be supported well with the existing
intrinsics, since the backend in LLVM would be unable to distinguish
between e.g. an image intrinsic using a 32-bit coordinate on a 1D
texture and 16-bit coordinates on a 2D texture (especially when
combined with some of the sampling modifiers like LOD bias and depth
compare).

So the new intrinsics make the "dimensionality" of the image a part of
the intrinsic name, and the number of coordinate parameters dependent
on it. The DA bit can also be derived from this dimensionality.

This series
- changes the ac_image_args interface to reflect the new intrinsics
- uses ac_build_image_opcode for image operations in addition to
  sampling ops
- switches to the new form of intrinsics on LLVM 7

I have done pretty extensive testing on radeonsi in both the TGSI
and NIR paths, but some of the changes are admittedly pretty subtle,
especially because of some generation-specific workarounds. Still,
unless there are some recent rebase surprises it should be mostly
good to go.

Please review!

Thanks,
Nicolai
--
 src/amd/common/ac_llvm_build.c               | 369 ++++++++--
 src/amd/common/ac_llvm_build.h               |  66 +-
 src/amd/common/ac_nir_to_llvm.c              | 607 +++++++----------
 .../auxiliary/gallivm/lp_bld_tgsi_action.h   |   2 +-
 .../drivers/radeonsi/si_shader_tgsi_mem.c    | 494 ++++++--------
 5 files changed, 825 insertions(+), 713 deletions(-)



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