[Mesa-dev] [PATCH] i965/urb/cnl: Apply gen7 CS stall

Topi Pohjolainen topi.pohjolainen at gmail.com
Thu Apr 19 14:44:06 UTC 2018


This didn't actually help the failing tests I'm looking at
but hopefully has teeth elsewhere.

CC: Jason Ekstrand <jason at jlekstrand.net>
CC: Jordan Justen <jordan.l.justen at intel.com>
CC: Anuj Phogat <anuj.phogat at gmail.com>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/gen7_urb.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/gen7_urb.c b/src/mesa/drivers/dri/i965/gen7_urb.c
index 2e5f8e6..9e12657 100644
--- a/src/mesa/drivers/dri/i965/gen7_urb.c
+++ b/src/mesa/drivers/dri/i965/gen7_urb.c
@@ -145,8 +145,15 @@ gen7_emit_push_constant_state(struct brw_context *brw, unsigned vs_size,
     *     in the ring after this instruction.
     *
     * No such restriction exists for Haswell or Baytrail.
+    *
+    * From the CNL Bspec, Windower -
+    * 3DSTATE_PUSH_CONSTANT_ALLOC_PS/VS/GS/DS/HS:
+    * 
+    *     This command must be followed by a PIPE_CONTROL with CS Stall bit
+    *     set.
     */
-   if (devinfo->gen < 8 && !devinfo->is_haswell && !devinfo->is_baytrail)
+   if ((devinfo->gen < 8 && !devinfo->is_haswell && !devinfo->is_baytrail) ||
+       devinfo->gen >= 10)
       gen7_emit_cs_stall_flush(brw);
 }
 
-- 
2.7.4



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