[Mesa-dev] [PATCH 1/2] radv: only set raster_config_1 outside the index registers.

Samuel Pitoiset samuel.pitoiset at gmail.com
Mon Apr 23 09:09:07 UTC 2018


Series is:

Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>

On 04/23/2018 02:43 AM, Dave Airlie wrote:
> From: Dave Airlie <airlied at redhat.com>
> 
> This follows what radeonsi does.
> 
> Ported from radeonsi:
>      radeonsi: emit PA_SC_RASTER_CONFIG_1 only once
> ---
>   src/amd/vulkan/si_cmd_buffer.c | 31 ++++++++++++++++---------------
>   1 file changed, 16 insertions(+), 15 deletions(-)
> 
> diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c
> index b7a2ca244bf..2140368c80d 100644
> --- a/src/amd/vulkan/si_cmd_buffer.c
> +++ b/src/amd/vulkan/si_cmd_buffer.c
> @@ -63,19 +63,6 @@ si_write_harvested_raster_configs(struct radv_physical_device *physical_device,
>   	 * fields are for, so I'm leaving them as their default
>   	 * values. */
>   
> -	if ((num_se > 2) && ((!se_mask[0] && !se_mask[1]) ||
> -			     (!se_mask[2] && !se_mask[3]))) {
> -		raster_config_1 &= C_028354_SE_PAIR_MAP;
> -
> -		if (!se_mask[0] && !se_mask[1]) {
> -			raster_config_1 |=
> -				S_028354_SE_PAIR_MAP(V_028354_RASTER_CONFIG_SE_PAIR_MAP_3);
> -		} else {
> -			raster_config_1 |=
> -				S_028354_SE_PAIR_MAP(V_028354_RASTER_CONFIG_SE_PAIR_MAP_0);
> -		}
> -	}
> -
>   	for (se = 0; se < num_se; se++) {
>   		unsigned raster_config_se = raster_config;
>   		unsigned pkr0_mask = ((1 << rb_per_pkr) - 1) << (se * rb_per_se);
> @@ -156,8 +143,6 @@ si_write_harvested_raster_configs(struct radv_physical_device *physical_device,
>   					       S_030800_SE_INDEX(se) | S_030800_SH_BROADCAST_WRITES(1) |
>   					       S_030800_INSTANCE_BROADCAST_WRITES(1));
>   		radeon_set_context_reg(cs, R_028350_PA_SC_RASTER_CONFIG, raster_config_se);
> -		if (physical_device->rad_info.chip_class >= CIK)
> -			radeon_set_context_reg(cs, R_028354_PA_SC_RASTER_CONFIG_1, raster_config_1);
>   	}
>   
>   	/* GRBM_GFX_INDEX has a different offset on SI and CI+ */
> @@ -170,6 +155,22 @@ si_write_harvested_raster_configs(struct radv_physical_device *physical_device,
>   		radeon_set_uconfig_reg(cs, R_030800_GRBM_GFX_INDEX,
>   				       S_030800_SE_BROADCAST_WRITES(1) | S_030800_SH_BROADCAST_WRITES(1) |
>   				       S_030800_INSTANCE_BROADCAST_WRITES(1));
> +
> +	if (physical_device->rad_info.chip_class >= CIK) {
> +		if ((num_se > 2) && ((!se_mask[0] && !se_mask[1]) ||
> +				     (!se_mask[2] && !se_mask[3]))) {
> +			raster_config_1 &= C_028354_SE_PAIR_MAP;
> +
> +			if (!se_mask[0] && !se_mask[1]) {
> +				raster_config_1 |=
> +					S_028354_SE_PAIR_MAP(V_028354_RASTER_CONFIG_SE_PAIR_MAP_3);
> +			} else {
> +				raster_config_1 |=
> +					S_028354_SE_PAIR_MAP(V_028354_RASTER_CONFIG_SE_PAIR_MAP_0);
> +			}
> +		}
> +		radeon_set_context_reg(cs, R_028354_PA_SC_RASTER_CONFIG_1, raster_config_1);
> +	}
>   }
>   
>   static void
> 


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