[Mesa-dev] [Bug 106246] radv: VK_PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT and bringing down initial pipeline compile times

bugzilla-daemon at freedesktop.org bugzilla-daemon at freedesktop.org
Fri Apr 27 14:49:36 UTC 2018


https://bugs.freedesktop.org/show_bug.cgi?id=106246

--- Comment #5 from Roland Scheidegger <sroland at vmware.com> ---
FWIW with llvmpipe (gallivm) we found that LICM can have very high cost (in
particular the lcssa pass that comes with it). I think though it was mostly
related to the main shader loop, which you don't have with radeonsi.
Doing some experiments having early-cse near the beginning (after sroa) seemed
to help somewhat, as it tends to make the IR simpler for the later passes at a
small cost (albeit sroa itself can blow IR up quite a bit). sroa and early-cse
at the beginning is also close to what off-line llvm opt -O2 would do. Albeit
radeonsi already has the memssa version of early-cse before instcombine, so
maybe that's sufficient... The -time-passes and -debug-pass=Structure tell you
a lot what passes actually get run and how much time they need, these also work
for codegen (llc). Of course that requires you dumped the bitcode somewhere out
of the driver (but if it's just millions of small shaders I wouldn't really
expect much in any case).

If there's some guidelines which passes make sense to run in which order, I'd
be definitely quite interested in that...

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