[Mesa-dev] [PATCH 11/18] radeonsi: don't use emit_data->args in build_interp_intrinsic

Marek Olšák maraeo at gmail.com
Sat Aug 4 07:54:50 UTC 2018


From: Marek Olšák <marek.olsak at amd.com>

---
 src/gallium/drivers/radeonsi/si_shader.c | 32 ++++++++++--------------
 1 file changed, 13 insertions(+), 19 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 3582e5366de..551671f4021 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -4009,34 +4009,31 @@ static void build_interp_intrinsic(const struct lp_build_tgsi_action *action,
 	struct si_shader_context *ctx = si_shader_context(bld_base);
 	struct si_shader *shader = ctx->shader;
 	const struct tgsi_shader_info *info = &shader->selector->info;
 	LLVMValueRef interp_param;
 	const struct tgsi_full_instruction *inst = emit_data->inst;
 	const struct tgsi_full_src_register *input = &inst->Src[0];
 	int input_base, input_array_size;
 	int chan;
 	int i;
 	LLVMValueRef prim_mask = ctx->abi.prim_mask;
-	LLVMValueRef array_idx;
+	LLVMValueRef array_idx, offset_x = NULL, offset_y = NULL;
 	int interp_param_idx;
 	unsigned interp;
 	unsigned location;
 
 	if (inst->Instruction.Opcode == TGSI_OPCODE_INTERP_OFFSET) {
 		/* offset is in second src, first two channels */
-		emit_data->args[0] = lp_build_emit_fetch(bld_base,
-							 emit_data->inst, 1,
-							 TGSI_CHAN_X);
-		emit_data->args[1] = lp_build_emit_fetch(bld_base,
-							 emit_data->inst, 1,
-							 TGSI_CHAN_Y);
-		emit_data->arg_count = 2;
+		offset_x = lp_build_emit_fetch(bld_base, emit_data->inst, 1,
+					       TGSI_CHAN_X);
+		offset_y = lp_build_emit_fetch(bld_base, emit_data->inst, 1,
+					       TGSI_CHAN_Y);
 	} else if (inst->Instruction.Opcode == TGSI_OPCODE_INTERP_SAMPLE) {
 		LLVMValueRef sample_position;
 		LLVMValueRef sample_id;
 		LLVMValueRef halfval = LLVMConstReal(ctx->f32, 0.5f);
 
 		/* fetch sample ID, then fetch its sample position,
 		 * and place into first two channels.
 		 */
 		sample_id = lp_build_emit_fetch(bld_base,
 						emit_data->inst, 1, TGSI_CHAN_X);
@@ -4062,30 +4059,27 @@ static void build_interp_intrinsic(const struct lp_build_tgsi_action *action,
 				LLVMConstReal(ctx->f32, 0.5),
 				ctx->ac.f32_0,
 				ctx->ac.f32_0,
 			};
 
 			sample_position = ac_build_gather_values(&ctx->ac, center, 4);
 		} else {
 			sample_position = load_sample_position(&ctx->abi, sample_id);
 		}
 
-		emit_data->args[0] = LLVMBuildExtractElement(ctx->ac.builder,
-							     sample_position,
-							     ctx->i32_0, "");
+		offset_x = LLVMBuildExtractElement(ctx->ac.builder, sample_position,
+						   ctx->i32_0, "");
 
-		emit_data->args[0] = LLVMBuildFSub(ctx->ac.builder, emit_data->args[0], halfval, "");
-		emit_data->args[1] = LLVMBuildExtractElement(ctx->ac.builder,
-							     sample_position,
-							     ctx->i32_1, "");
-		emit_data->args[1] = LLVMBuildFSub(ctx->ac.builder, emit_data->args[1], halfval, "");
-		emit_data->arg_count = 2;
+		offset_x = LLVMBuildFSub(ctx->ac.builder, offset_x, halfval, "");
+		offset_y = LLVMBuildExtractElement(ctx->ac.builder, sample_position,
+						   ctx->i32_1, "");
+		offset_y = LLVMBuildFSub(ctx->ac.builder, offset_y, halfval, "");
 	}
 
 	assert(input->Register.File == TGSI_FILE_INPUT);
 
 	if (input->Register.Indirect) {
 		unsigned array_id = input->Indirect.ArrayID;
 
 		if (array_id) {
 			input_base = info->input_array_first[array_id];
 			input_array_size = info->input_array_last[array_id] - input_base + 1;
@@ -4137,25 +4131,25 @@ static void build_interp_intrinsic(const struct lp_build_tgsi_action *action,
 			LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
 								      ddxy_out, ix_ll, "");
 			LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
 								      ddxy_out, iy_ll, "");
 			LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
 									 interp_param, ix_ll, "");
 			LLVMValueRef temp1, temp2;
 
 			interp_el = ac_to_float(&ctx->ac, interp_el);
 
-			temp1 = LLVMBuildFMul(ctx->ac.builder, ddx_el, emit_data->args[0], "");
+			temp1 = LLVMBuildFMul(ctx->ac.builder, ddx_el, offset_x, "");
 
 			temp1 = LLVMBuildFAdd(ctx->ac.builder, temp1, interp_el, "");
 
-			temp2 = LLVMBuildFMul(ctx->ac.builder, ddy_el, emit_data->args[1], "");
+			temp2 = LLVMBuildFMul(ctx->ac.builder, ddy_el, offset_y, "");
 
 			ij_out[i] = LLVMBuildFAdd(ctx->ac.builder, temp2, temp1, "");
 		}
 		interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
 	}
 
 	if (interp_param)
 		interp_param = ac_to_float(&ctx->ac, interp_param);
 
 	for (chan = 0; chan < 4; chan++) {
-- 
2.17.1



More information about the mesa-dev mailing list