[Mesa-dev] [PATCH v3 02/13] nvc0/ir: return 0 in imageLoad on incomplete textures

[Dylan Baker]

Quoting Karol Herbst (2018-07-15 11:15:42)
> We already guarded all OP_SULDP against out of bound accesses, but those
> ended up just reusing whatever value was stored in the dest registers.
> 
> fixes CTS test shader_image_load_store.incomplete_textures
> 
> v2: fix for loads not ending up with predicates (bindless_texture)
> v3: fix replacing the def
> 
> Signed-off-by: Karol Herbst <kherbst at redhat.com>
> ---
>  .../nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 33 +++++++++++++++++--
>  .../nouveau/codegen/nv50_ir_lowering_nvc0.h   |  1 +
>  2 files changed, 31 insertions(+), 3 deletions(-)
> 
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> index 1410cf26c87..743f5bd552b 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> @@ -2151,13 +2151,36 @@ NVC0LoweringPass::convertSurfaceFormat(TexInstruction *su)
>     }
>  }
>  
> +void
> +NVC0LoweringPass::insertOOBSurfaceOpResult(TexInstruction *su)
> +{
> +   if (!su->getPredicate())
> +      return;
> +
> +   bld.setPosition(su, true);
> +
> +   for (unsigned i = 0; su->defExists(i); ++i) {
> +      ValueDef &def = su->def(i);
> +
> +      Instruction *mov = bld.mkMov(bld.getSSA(), bld.loadImm(NULL, 0));
> +      assert(su->cc == CC_NOT_P);
> +      mov->setPredicate(CC_P, su->getPredicate());
> +      Instruction *uni = bld.mkOp2(OP_UNION, TYPE_U32, bld.getSSA(), NULL, mov->getDef(0));
> +
> +      def.replace(uni->getDef(0), false);
> +      uni->setSrc(0, def.get());
> +   }
> +}
> +
>  void
>  NVC0LoweringPass::handleSurfaceOpNVE4(TexInstruction *su)
>  {
>     processSurfaceCoordsNVE4(su);
>  
> -   if (su->op == OP_SULDP)
> +   if (su->op == OP_SULDP) {
>        convertSurfaceFormat(su);
> +      insertOOBSurfaceOpResult(su);
> +   }
>  
>     if (su->op == OP_SUREDB || su->op == OP_SUREDP) {
>        assert(su->getPredicate());
> @@ -2267,8 +2290,10 @@ NVC0LoweringPass::handleSurfaceOpNVC0(TexInstruction *su)
>  
>     processSurfaceCoordsNVC0(su);
>  
> -   if (su->op == OP_SULDP)
> +   if (su->op == OP_SULDP) {
>        convertSurfaceFormat(su);
> +      insertOOBSurfaceOpResult(su);
> +   }
>  
>     if (su->op == OP_SUREDB || su->op == OP_SUREDP) {
>        const int dim = su->tex.target.getDim();
> @@ -2370,8 +2395,10 @@ NVC0LoweringPass::handleSurfaceOpGM107(TexInstruction *su)
>  {
>     processSurfaceCoordsGM107(su);
>  
> -   if (su->op == OP_SULDP)
> +   if (su->op == OP_SULDP) {
>        convertSurfaceFormat(su);
> +      insertOOBSurfaceOpResult(su);
> +   }
>  
>     if (su->op == OP_SUREDP) {
>        Value *def = su->getDef(0);
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h
> index 8724c09afd9..5dbb3e4f009 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h
> @@ -172,6 +172,7 @@ private:
>     void processSurfaceCoordsNVE4(TexInstruction *);
>     void processSurfaceCoordsNVC0(TexInstruction *);
>     void convertSurfaceFormat(TexInstruction *);
> +   void insertOOBSurfaceOpResult(TexInstruction *);
>     Value *calculateSampleOffset(Value *sampleID);
>  
>  protected:
> -- 
> 2.17.1
> 
> _______________________________________________
> mesa-dev mailing list
> mesa-dev at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Hi Karol,

I had to fix a couple of minor merge conflicts in the 18.1 branch, I've compile
tested, but could you have a look at the staging/18.1 branch and make sure
everything looks good?

Thanks,
Dylan
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