[Mesa-dev] [PATCH 2/9] radeonsi/gfx9: fix WAITCNT flags

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

---
 src/gallium/drivers/radeonsi/si_shader_internal.h | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader_internal.h b/src/gallium/drivers/radeonsi/si_shader_internal.h
index ac7784f7d46..6cc503690da 100644
--- a/src/gallium/drivers/radeonsi/si_shader_internal.h
+++ b/src/gallium/drivers/radeonsi/si_shader_internal.h
@@ -282,23 +282,25 @@ LLVMValueRef si_nir_lookup_interp_param(struct ac_shader_abi *abi,
 					enum glsl_interp_mode interp,
 					unsigned location);
 
 void si_llvm_emit_store(struct lp_build_tgsi_context *bld_base,
 			const struct tgsi_full_instruction *inst,
 			const struct tgsi_opcode_info *info,
 			unsigned index,
 			LLVMValueRef dst[4]);
 
 /* Combine these with & instead of |. */
-#define NOOP_WAITCNT 0xf7f
-#define LGKM_CNT 0x07f
-#define VM_CNT 0xf70
+#define NOOP_WAITCNT 0xcf7f
+#define LGKM_CNT 0xc07f
+#define EXP_CNT 0xcf0f
+/* On GFX9, vmcnt has 6 bits in [0:3] and [14:15] */
+#define VM_CNT 0x0f70
 
 LLVMValueRef si_get_indirect_index(struct si_shader_context *ctx,
 				   const struct tgsi_ind_register *ind,
 				   unsigned addr_mul, int rel_index);
 LLVMValueRef si_get_bounded_indirect_index(struct si_shader_context *ctx,
 					   const struct tgsi_ind_register *ind,
 					   int rel_index, unsigned num);
 LLVMValueRef si_get_sample_id(struct si_shader_context *ctx);
 
 void si_shader_context_init_alu(struct lp_build_tgsi_context *bld_base);
-- 
2.17.1