[Mesa-dev] [PATCH 2/2] i965: Add INTEL_fragment_shader_ordering support.

[Jason Ekstrand]

Are there any tests for this?

--Jason

On Mon, Aug 27, 2018 at 1:54 AM <kevin.rogovin at intel.com> wrote:

> From: Kevin Rogovin <kevin.rogovin at intel.com>
>
>     Adds suppport for INTEL_fragment_shader_ordering. We achieve
>     the fragment ordering by using the same instruction as for
>     beginInvocationInterlockARB() which is by issuing a memory
>     fence via sendc.
>
> Signed-off-by: Kevin Rogovin <kevin.rogovin at intel.com>
> ---
>  docs/relnotes/18.3.0.html                    | 1 +
>  src/intel/compiler/brw_fs_nir.cpp            | 1 +
>  src/mesa/drivers/dri/i965/intel_extensions.c | 1 +
>  3 files changed, 3 insertions(+)
>
> diff --git a/docs/relnotes/18.3.0.html b/docs/relnotes/18.3.0.html
> index afcb044817..71fb41ca86 100644
> --- a/docs/relnotes/18.3.0.html
> +++ b/docs/relnotes/18.3.0.html
> @@ -59,6 +59,7 @@ Note: some of the new features are only available with
> certain drivers.
>  <li>GL_EXT_vertex_attrib_64bit on i965, nvc0, radeonsi.</li>
>  <li>GL_EXT_window_rectangles on radeonsi.</li>
>  <li>GL_KHR_texture_compression_astc_sliced_3d on radeonsi.</li>
> +<li>GL_INTEL_fragment_shader_ordering on i965.</li>
>  <li>GL_NV_fragment_shader_interlock on i965.</li>
>  </ul>
>
> diff --git a/src/intel/compiler/brw_fs_nir.cpp
> b/src/intel/compiler/brw_fs_nir.cpp
> index 9c9df5ac09..62bff2a323 100644
> --- a/src/intel/compiler/brw_fs_nir.cpp
> +++ b/src/intel/compiler/brw_fs_nir.cpp
> @@ -4836,6 +4836,7 @@ fs_visitor::nir_emit_intrinsic(const fs_builder
> &bld, nir_intrinsic_instr *instr
>        break;
>     }
>
> +   case nir_intrinsic_begin_fragment_shader_ordering:
>     case nir_intrinsic_begin_invocation_interlock: {
>        const fs_builder ubld = bld.group(8, 0);
>        const fs_reg tmp = ubld.vgrf(BRW_REGISTER_TYPE_UD, 2);
> diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c
> b/src/mesa/drivers/dri/i965/intel_extensions.c
> index 0b137664b0..1ea8594c34 100644
> --- a/src/mesa/drivers/dri/i965/intel_extensions.c
> +++ b/src/mesa/drivers/dri/i965/intel_extensions.c
> @@ -247,6 +247,7 @@ intelInitExtensions(struct gl_context *ctx)
>        ctx->Extensions.OES_primitive_bounding_box = true;
>        ctx->Extensions.OES_texture_buffer = true;
>        ctx->Extensions.ARB_fragment_shader_interlock = true;
> +      ctx->Extensions.INTEL_fragment_shader_ordering = true;
>
>        if (can_do_pipelined_register_writes(brw->screen)) {
>           ctx->Extensions.ARB_draw_indirect = true;
> --
> 2.17.1
>
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