[Mesa-dev] [PATCH 9/9] intel/compiler: Use partial redundancy elimination for compares

[Ian Romanick]

From: Ian Romanick <ian.d.romanick at intel.com>

Almost all of the hurt shaders are repeated instances of the same shader
in synmark's compilation speed tests.

shader-db results:

All Gen6+ platforms had similar results. (Skylake shown)
total instructions in shared programs: 15083798 -> 15083033 (<.01%)
instructions in affected programs: 81932 -> 81167 (-0.93%)
helped: 395
HURT: 0
helped stats (abs) min: 1 max: 12 x̄: 1.94 x̃: 1
helped stats (rel) min: 0.06% max: 26.67% x̄: 1.81% x̃: 0.80%
95% mean confidence interval for instructions value: -2.09 -1.78
95% mean confidence interval for instructions %-change: -2.17% -1.46%
Instructions are helped.

total cycles in shared programs: 565911206 -> 565894509 (<.01%)
cycles in affected programs: 1101634 -> 1084937 (-1.52%)
helped: 333
HURT: 51
helped stats (abs) min: 1 max: 366 x̄: 54.49 x̃: 8
helped stats (rel) min: 0.02% max: 21.45% x̄: 3.44% x̃: 0.82%
HURT stats (abs)   min: 2 max: 130 x̄: 28.39 x̃: 33
HURT stats (rel)   min: <.01% max: 12.31% x̄: 0.85% x̃: 0.63%
95% mean confidence interval for cycles value: -53.40 -33.56
95% mean confidence interval for cycles %-change: -3.48% -2.27%
Cycles are helped.

Iron Lake
total instructions in shared programs: 8207310 -> 8206971 (<.01%)
instructions in affected programs: 42319 -> 41980 (-0.80%)
helped: 136
HURT: 0
helped stats (abs) min: 1 max: 9 x̄: 2.49 x̃: 2
helped stats (rel) min: 0.27% max: 14.29% x̄: 1.86% x̃: 0.66%
95% mean confidence interval for instructions value: -2.73 -2.25
95% mean confidence interval for instructions %-change: -2.40% -1.31%
Instructions are helped.

total cycles in shared programs: 187491364 -> 187489998 (<.01%)
cycles in affected programs: 665008 -> 663642 (-0.21%)
helped: 125
HURT: 2
helped stats (abs) min: 2 max: 36 x̄: 10.96 x̃: 12
helped stats (rel) min: 0.04% max: 3.85% x̄: 0.50% x̃: 0.23%
HURT stats (abs)   min: 2 max: 2 x̄: 2.00 x̃: 2
HURT stats (rel)   min: 0.04% max: 0.09% x̄: 0.06% x̃: 0.06%
95% mean confidence interval for cycles value: -11.76 -9.75
95% mean confidence interval for cycles %-change: -0.61% -0.37%
Cycles are helped.

GM45
total instructions in shared programs: 5047096 -> 5046872 (<.01%)
instructions in affected programs: 26103 -> 25879 (-0.86%)
helped: 82
HURT: 0
helped stats (abs) min: 1 max: 9 x̄: 2.73 x̃: 2
helped stats (rel) min: 0.27% max: 13.33% x̄: 1.71% x̃: 0.94%
95% mean confidence interval for instructions value: -3.04 -2.42
95% mean confidence interval for instructions %-change: -2.33% -1.09%
Instructions are helped.

total cycles in shared programs: 128075484 -> 128074444 (<.01%)
cycles in affected programs: 416730 -> 415690 (-0.25%)
helped: 81
HURT: 1
helped stats (abs) min: 2 max: 36 x̄: 12.86 x̃: 12
helped stats (rel) min: 0.06% max: 3.85% x̄: 0.58% x̃: 0.30%
HURT stats (abs)   min: 2 max: 2 x̄: 2.00 x̃: 2
HURT stats (rel)   min: 0.09% max: 0.09% x̄: 0.09% x̃: 0.09%
95% mean confidence interval for cycles value: -14.00 -11.36
95% mean confidence interval for cycles %-change: -0.74% -0.40%
Cycles are helped.

Signed-off-by: Ian Romanick <ian.d.romanick at intel.com>
---
 src/intel/compiler/brw_nir.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
index 2eba6a42266..38d14ca960d 100644
--- a/src/intel/compiler/brw_nir.c
+++ b/src/intel/compiler/brw_nir.c
@@ -810,6 +810,26 @@ brw_postprocess_nir(nir_shader *nir, const struct brw_compiler *compiler,
       OPT(brw_nir_opt_peephole_ffma);
    }
 
+   if (OPT(nir_opt_comparison_pre)) {
+      OPT(nir_copy_prop);
+      OPT(nir_opt_dce);
+      OPT(nir_opt_cse);
+
+      /* Do the select peepehole again.  nir_opt_comparison_pre (combined with
+       * the other optimization passes) will have removed at least one
+       * instruction from one of the branches of the if-statement, so now it
+       * might be under the threshold of conversion to bcsel.
+       *
+       * See brw_nir_optimize for the explanation of is_vec4_tessellation.
+       */
+      const bool is_vec4_tessellation = !is_scalar &&
+         (nir->info.stage == MESA_SHADER_TESS_CTRL ||
+          nir->info.stage == MESA_SHADER_TESS_EVAL);
+      OPT(nir_opt_peephole_select, 0, is_vec4_tessellation, false);
+      OPT(nir_opt_peephole_select, 1, is_vec4_tessellation,
+          compiler->devinfo->gen >= 6);
+   }
+
    OPT(nir_opt_algebraic_late);
 
    OPT(nir_lower_to_source_mods);
-- 
2.14.4