[Mesa-dev] [PATCH] gallivm/radeonsi: allow to pass two swizzles into fetches.

Dave Airlie airlied at gmail.com
Fri Aug 31 00:14:38 UTC 2018


On Fri., 31 Aug. 2018, 01:22 Michel Dänzer, <michel at daenzer.net> wrote:
>
> On 2018-08-27 11:16 p.m., Dave Airlie wrote:
> > From: Dave Airlie <airlied at redhat.com>
> >
> > This hijacks the top 16-bits of swizzle, to pass in the swizzle
> > for the second channel.
> >
> > This fixes handling .yx swizzles of 64-bit values.
> >
> > This should fixup radeonsi and llvmpipe.
> >
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107524
>
> This change broke a bunch of piglit tests for me with radeonsi on
> Bonair
>

Wierd I did piglit runs locally, but I must have screwed them up somehow.

I've sent two patches to fix up the regressions, thanks for finding
and reporting them!

Dave.


> spec at arb_enhanced_layouts@execution at component-layout@vs-fs-array-dvec3
> spec at arb_tessellation_shader@execution at dvec2-vs-tcs-tes
> spec at arb_tessellation_shader@execution at double-array-vs-tcs-tes
> spec at arb_tessellation_shader@execution at double-vs-tcs-tes
> spec at arb_tessellation_shader@execution at dvec3-vs-tcs-tes
> spec at arb_tessellation_shader@execution at variable-indexing@tes-input-array-dvec4-index-rd
> spec at arb_tessellation_shader@execution at variable-indexing@vs-output-array-dvec4-index-wr-before-tcs
> spec at arb_tessellation_shader@execution at variable-indexing@tcs-output-array-dvec4-index-wr
> spec at arb_tessellation_shader@execution at variable-indexing@tcs-input-array-dvec4-index-rd
>
>
> --
> Earthling Michel Dänzer               |               http://www.amd.com
> Libre software enthusiast             |             Mesa and X developer


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