[Mesa-dev] [PATCH 3/3] intel: Introducing Whiskey Lake platform

[Rodrigo Vivi]

On Fri, Aug 31, 2018 at 11:05:13AM +0100, Lionel Landwerlin wrote:
> On 30/08/2018 22:41, Rodrigo Vivi wrote:
> > Whiskey Lake uses the same gen graphics as Coffe Lake, including some
> > ids that were previously marked as reserved on Coffe Lake, but that
> > now are moved to WHL page.
> > 
> > This follows the ids and approach used on kernel's commit
> > b9be78531d27 ("drm/i915/whl: Introducing Whiskey Lake platform")
> > 
> > Cc: José Roberto de Souza <jose.souza at intel.com>
> > Cc: Anuj Phogat <anuj.phogat at gmail.com>
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> > ---
> >   include/pci_ids/i965_pci_ids.h          | 10 +++++-----
> >   src/intel/compiler/test_eu_validate.cpp |  1 +
> >   src/intel/dev/gen_device_info.c         |  1 +
> >   src/intel/tools/aubinator.c             |  2 +-
> >   4 files changed, 8 insertions(+), 6 deletions(-)
> > 
> > diff --git a/include/pci_ids/i965_pci_ids.h b/include/pci_ids/i965_pci_ids.h
> > index 4efac638e9..d151b3dd0e 100644
> > --- a/include/pci_ids/i965_pci_ids.h
> > +++ b/include/pci_ids/i965_pci_ids.h
> > @@ -170,8 +170,6 @@ CHIPSET(0x3185, glk_2x6, "Intel(R) UHD Graphics 600 (Geminilake 2x6)")
> >   CHIPSET(0x3E90, cfl_gt1, "Intel(R) UHD Graphics 610 (Coffeelake 2x6 GT1)")
> >   CHIPSET(0x3E93, cfl_gt1, "Intel(R) UHD Graphics 610 (Coffeelake 2x6 GT1)")
> >   CHIPSET(0x3E99, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
> > -CHIPSET(0x3EA1, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
> > -CHIPSET(0x3EA4, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
> >   CHIPSET(0x3E91, cfl_gt2, "Intel(R) UHD Graphics 630 (Coffeelake 3x8 GT2)")
> >   CHIPSET(0x3E92, cfl_gt2, "Intel(R) UHD Graphics 630 (Coffeelake 3x8 GT2)")
> >   CHIPSET(0x3E96, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
> > @@ -179,14 +177,16 @@ CHIPSET(0x3E98, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
> >   CHIPSET(0x3E9A, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
> >   CHIPSET(0x3E9B, cfl_gt2, "Intel(R) UHD Graphics 630 (Coffeelake 3x8 GT2)")
> >   CHIPSET(0x3E94, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
> > -CHIPSET(0x3EA0, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
> > -CHIPSET(0x3EA3, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
> >   CHIPSET(0x3EA9, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
> > -CHIPSET(0x3EA2, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
> >   CHIPSET(0x3EA5, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
> >   CHIPSET(0x3EA6, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
> >   CHIPSET(0x3EA7, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
> >   CHIPSET(0x3EA8, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
> > +CHIPSET(0x3EA1, cfl_gt1, "Intel(R) HD Graphics (Whiskey Lake 2x6 GT1)")
> > +CHIPSET(0x3EA0, cfl_gt2, "Intel(R) HD Graphics (Whiskey Lake 3x8 GT2)")
> > +CHIPSET(0x3EA2, cfl_gt3, "Intel(R) HD Graphics (Whiskey Lake 3x8 GT3)")
> > +CHIPSET(0x3EA3, cfl_gt3, "Intel(R) HD Graphics (Whiskey Lake 3x8 GT3)")
> > +CHIPSET(0x3EA4, cfl_gt3, "Intel(R) HD Graphics (Whiskey Lake 3x8 GT3)")
> 
> 
> Documentation says 0x3EA3 has only 12 EUs. Doesn't sound like GT3.

Yeap, it seems a spec bug that got propagated to kernel and luckly you caught here:

U42	24	3EA0
U41f	12	3EA1
U43	48	3EA2
U43	24	3EA3
U43	12	3EA4

I will file an issue there and update this one later...

But I will push the first 2 patches because on second one there is a missed id.
Thanks for reviewing it.

> 
> 
> >   CHIPSET(0x5A49, cnl_2x8, "Intel(R) HD Graphics (Cannonlake 2x8 GT0.5)")
> >   CHIPSET(0x5A4A, cnl_2x8, "Intel(R) HD Graphics (Cannonlake 2x8 GT0.5)")
> >   CHIPSET(0x5A41, cnl_3x8, "Intel(R) HD Graphics (Cannonlake 3x8 GT1)")
> > diff --git a/src/intel/compiler/test_eu_validate.cpp b/src/intel/compiler/test_eu_validate.cpp
> > index 744ae5806d..73300b2312 100644
> > --- a/src/intel/compiler/test_eu_validate.cpp
> > +++ b/src/intel/compiler/test_eu_validate.cpp
> > @@ -43,6 +43,7 @@ static const struct gen_info {
> >      { "aml", },
> >      { "glk", },
> >      { "cfl", },
> > +   { "whl", },
> >      { "cnl", },
> >      { "icl", },
> >   };
> > diff --git a/src/intel/dev/gen_device_info.c b/src/intel/dev/gen_device_info.c
> > index 3cece52a04..0f12d17a84 100644
> > --- a/src/intel/dev/gen_device_info.c
> > +++ b/src/intel/dev/gen_device_info.c
> > @@ -60,6 +60,7 @@ gen_device_name_to_pci_device_id(const char *name)
> >         { "aml", 0x591C },
> >         { "glk", 0x3185 },
> >         { "cfl", 0x3E9B },
> > +      { "whl", 0x3EA1 },
> >         { "cnl", 0x5a52 },
> >         { "icl", 0x8a52 },
> >      };
> > diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c
> > index 55672fa073..7de20f3d7a 100644
> > --- a/src/intel/tools/aubinator.c
> > +++ b/src/intel/tools/aubinator.c
> > @@ -282,7 +282,7 @@ int main(int argc, char *argv[])
> >            if (id < 0) {
> >               fprintf(stderr, "can't parse gen: '%s', expected brw, g4x, ilk, "
> >                               "snb, ivb, hsw, byt, bdw, chv, skl, bxt, kbl, "
> > -                            "aml, glk, cfl, cnl, icl", optarg);
> > +                            "aml, glk, cfl, whl, cnl, icl", optarg);
> >               exit(EXIT_FAILURE);
> >            } else {
> >               pci_id = id;
> 
>