[Mesa-dev] [PATCH 30/59] intel/compiler: document MAD algebraic optimization

[Iago Toral Quiroga]

This optimization depends on two other optimization passes: the
constant propagation pass, which allows immediate propagation
on MAD/LRP instructions even though the hardware can't do it,
and the combine constants pass to fix this up afterwards for the
cases that we could not optimize here.

Also, the optimization can generate cases for MUL/ADD that we
should not find otherwise, which are then implemented building
on that assumption, so better documenting these is useful.
---
 src/intel/compiler/brw_fs.cpp | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index 509c6febf38..a9ddafc05d1 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -2461,6 +2461,11 @@ fs_visitor::opt_algebraic()
          }
 
          if (inst->src[0].file == IMM) {
+            /* We produce these from the MAD optimization below, which
+             * should only be happening for 32-bit float because we
+             * prevent constant propagation to MAD sources for other
+             * bit-sizes.
+             */
             assert(inst->src[0].type == BRW_REGISTER_TYPE_F);
             inst->opcode = BRW_OPCODE_MOV;
             inst->src[0].f *= inst->src[1].f;
@@ -2482,6 +2487,11 @@ fs_visitor::opt_algebraic()
          }
 
          if (inst->src[0].file == IMM) {
+            /* We produce these from the MAD optimization below, which
+             * should only be happening for 32-bit float because we
+             * prevent constant propagation to MAD sources for other
+             * bit-sizes.
+             */
             assert(inst->src[0].type == BRW_REGISTER_TYPE_F);
             inst->opcode = BRW_OPCODE_MOV;
             inst->src[0].f += inst->src[1].f;
@@ -2565,6 +2575,11 @@ fs_visitor::opt_algebraic()
          }
          break;
       case BRW_OPCODE_MAD:
+         /* ALign16 MAD can't do immediate sources, however we allow constant
+          * propagation to these instructions to enable these algebraic
+          * optimizations. For the cases that we can't optmize here, we
+          * rely on the combine constants pass to fix it up later.
+          */
          if (inst->src[1].is_zero() || inst->src[2].is_zero()) {
             inst->opcode = BRW_OPCODE_MOV;
             inst->src[1] = reg_undef;
@@ -2585,6 +2600,13 @@ fs_visitor::opt_algebraic()
             inst->src[2] = reg_undef;
             progress = true;
          } else if (inst->src[1].file == IMM && inst->src[2].file == IMM) {
+            /* We should not be getting here for anything other than 32-bit
+             * float since we prevent constant-propagation to MAD instructions
+             * for everything else.
+             */
+            assert(inst->src[1].type == inst->src[2].type &&
+                   inst->src[1].type == BRW_REGISTER_TYPE_F);
+
             inst->opcode = BRW_OPCODE_ADD;
             inst->src[1].f *= inst->src[2].f;
             inst->src[2] = reg_undef;
-- 
2.17.1