[Mesa-dev] [PATCH 17/59] intel/compiler: allow extended math functions with HF operands

Pohjolainen, Topi topi.pohjolainen at gmail.com
Tue Dec 4 17:22:21 UTC 2018


On Tue, Dec 04, 2018 at 08:16:41AM +0100, Iago Toral Quiroga wrote:
> The PRM states that half-float operands are supported since gen9.
> ---
>  src/intel/compiler/brw_eu_emit.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)

Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>

> 
> diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c
> index 4630b83b1a0..5f066d17a1f 100644
> --- a/src/intel/compiler/brw_eu_emit.c
> +++ b/src/intel/compiler/brw_eu_emit.c
> @@ -1860,8 +1860,10 @@ void gen6_math(struct brw_codegen *p,
>        assert(src1.file == BRW_GENERAL_REGISTER_FILE ||
>               (devinfo->gen >= 8 && src1.file == BRW_IMMEDIATE_VALUE));
>     } else {
> -      assert(src0.type == BRW_REGISTER_TYPE_F);
> -      assert(src1.type == BRW_REGISTER_TYPE_F);
> +      assert(src0.type == BRW_REGISTER_TYPE_F ||
> +             (src0.type == BRW_REGISTER_TYPE_HF && devinfo->gen >= 9));
> +      assert(src1.type == BRW_REGISTER_TYPE_F ||
> +             (src1.type == BRW_REGISTER_TYPE_HF && devinfo->gen >= 9));
>     }
>  
>     /* Source modifiers are ignored for extended math instructions on Gen6. */
> -- 
> 2.17.1
> 
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