[Mesa-dev] [PATCH 13/25] radeonsi: don't set RAW_WAIT for CP DMA clears

Nicolai Hähnle nhaehnle at gmail.com
Thu Dec 6 14:00:34 UTC 2018


From: Nicolai Hähnle <nicolai.haehnle at amd.com>

There is never a read-after-write hazard because the command doesn't read.
---
 src/gallium/drivers/radeonsi/si_cp_dma.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c b/src/gallium/drivers/radeonsi/si_cp_dma.c
index 33220d9f0fa..80673f3f5f2 100644
--- a/src/gallium/drivers/radeonsi/si_cp_dma.c
+++ b/src/gallium/drivers/radeonsi/si_cp_dma.c
@@ -182,21 +182,22 @@ static void si_cp_dma_prepare(struct si_context *sctx, struct pipe_resource *dst
 						  r600_resource(src),
 						  RADEON_USAGE_READ, RADEON_PRIO_CP_DMA);
 	}
 
 	/* Flush the caches for the first copy only.
 	 * Also wait for the previous CP DMA operations.
 	 */
 	if (!(user_flags & SI_CPDMA_SKIP_GFX_SYNC) && sctx->flags)
 		si_emit_cache_flush(sctx);
 
-	if (!(user_flags & SI_CPDMA_SKIP_SYNC_BEFORE) && *is_first)
+	if (!(user_flags & SI_CPDMA_SKIP_SYNC_BEFORE) && *is_first &&
+	    !(*packet_flags & CP_DMA_CLEAR))
 		*packet_flags |= CP_DMA_RAW_WAIT;
 
 	*is_first = false;
 
 	/* Do the synchronization after the last dma, so that all data
 	 * is written to memory.
 	 */
 	if (!(user_flags & SI_CPDMA_SKIP_SYNC_AFTER) &&
 	    byte_count == remaining_size) {
 		*packet_flags |= CP_DMA_SYNC;
-- 
2.19.1



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