[Mesa-dev] [PATCH 11/28] util: added float to float16 conversions with RTZ and RTNE

[Matt Turner]

On Thu, Dec 6, 2018 at 7:22 PM Roland Scheidegger <sroland at vmware.com> wrote:
>
> Am 07.12.18 um 03:20 schrieb Matt Turner:
> > Since this is for an extension that will be BDW+ can we use the
> > _cvtss_sh() intrinsic instead? It corresponds to an IVB+ instruction
> > and even takes the rounding mode directly as an immediate argument.
>
> Not saying trying to use it isn't a good idea, but you'd need the right
> compile flags, and you can't assume it's present, since even the latest
> pentiums don't support avx (and by extension, f16c). (The same is true
> for atoms too, of course).

I'm not sure that AVX and F16C are related, but from a quick glance it
seems that you're right that Atoms ("little core") doesn't support
F16C. I had no idea :(

As far as I can tell all "big cores" have F16C. That's what
https://gcc.gnu.org/onlinedocs/gcc/x86-Options.html indicates.

If we've got to have the code, we might as well use it and not
complicate it by using _cvtss_sh() then. Dang.

(Unfortunately there seems to be bad information out there confusing
things though... see https://communities.intel.com/thread/121635)