[Mesa-dev] [PATCH 14/59] intel/compiler: lower some 16-bit float operations to 32-bit

[Jason Ekstrand]

Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

On Tue, Dec 4, 2018 at 1:18 AM Iago Toral Quiroga <itoral at igalia.com> wrote:

> The hardware doesn't support half-float for these.
> ---
>  src/intel/compiler/brw_nir.c | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
> index aa6788b9fe5..e0027f5179c 100644
> --- a/src/intel/compiler/brw_nir.c
> +++ b/src/intel/compiler/brw_nir.c
> @@ -620,6 +620,11 @@ lower_bit_size_callback(const nir_alu_instr *alu,
> UNUSED void *data)
>     case nir_op_irem:
>     case nir_op_udiv:
>     case nir_op_umod:
> +   case nir_op_fceil:
> +   case nir_op_ffloor:
> +   case nir_op_ffract:
> +   case nir_op_fround_even:
> +   case nir_op_ftrunc:
>        return 32;
>     default:
>        return 0;
> --
> 2.17.1
>
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