[Mesa-dev] [PATCH 2/2] ac: split 16-bit ssbo loads that may not be dword aligned

[Samuel Pitoiset]

See my comment on the first patch. Anyways, series is:

Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>

On 12/13/18 6:06 PM, Rhys Perry wrote:
> Fixes: 7e7ee826982 ('ac: add support for 16bit buffer loads')
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108114
> Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
> ---
>   src/amd/common/ac_nir_to_llvm.c | 2 ++
>   1 file changed, 2 insertions(+)
> 
> diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
> index c05b45e084..4a4c09cf5f 100644
> --- a/src/amd/common/ac_nir_to_llvm.c
> +++ b/src/amd/common/ac_nir_to_llvm.c
> @@ -1642,6 +1642,8 @@ static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
>   	LLVMValueRef results[4];
>   	for (int i = 0; i < num_components;) {
>   		int num_elems = num_components - i;
> +		if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
> +			num_elems = 1;
>   		if (num_elems * elem_size_bytes > 16)
>   			num_elems = 16 / elem_size_bytes;
>   		int load_bytes = num_elems * elem_size_bytes;
>