[Mesa-dev] [Bug 109075] radv: New D3D boolean optimizations cause GPU hang in Witcher 3

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=109075

--- Comment #3 from Timothy Arceri <t_arceri at yahoo.com.au> ---
Maybe getting stuck in a infinite loop?

There is a loop exit condition in the witcher where the optimise the following: 

                /* preds: block_3 */
                vec2 32 ssa_114 = vec2 ssa_105, ssa_4
                vec4 32 ssa_115 = txf ssa_95 (texture_deref), ssa_114 (coord),
ssa_4 (lod), 0 (sampler), 
                vec1 1 ssa_120 = flt ssa_115.x, ssa_93
                vec1 1 ssa_121 = flt ssa_115.y, ssa_94
                vec1 32 ssa_122 = b2i32 ssa_120
                vec1 32 ssa_123 = ineg ssa_122
                vec1 32 ssa_125 = b2i32 ssa_121
                vec1 32 ssa_126 = ineg ssa_125
                vec1 1 ssa_128 = flt ssa_93, ssa_115.z
                vec1 1 ssa_129 = flt ssa_94, ssa_115.w
                vec1 32 ssa_130 = b2i32 ssa_128
                vec1 32 ssa_131 = ineg ssa_130
                vec1 32 ssa_133 = b2i32 ssa_129
                vec1 32 ssa_134 = ineg ssa_133
                vec1 32 ssa_136 = iand ssa_123, ssa_131
                vec1 32 ssa_137 = iand ssa_126, ssa_136
                vec1 32 ssa_138 = iand ssa_134, ssa_137
                vec1 1 ssa_139 = ine ssa_138, ssa_4

to:

                vec2 32 ssa_87 = vec2 ssa_84, ssa_4
                vec4 32 ssa_88 = txf ssa_82 (texture_deref), ssa_87 (coord),
ssa_4 (lod), 0 (sampler),
                vec1 1 ssa_89 = flt ssa_88.x, ssa_80
                vec1 1 ssa_90 = flt ssa_88.y, ssa_81
                vec1 32 ssa_91 = b2i32 ssa_89
                vec1 32 ssa_92 = ineg ssa_91
                vec1 32 ssa_93 = b2i32 ssa_90
                vec1 32 ssa_94 = ineg ssa_93
                vec1 1 ssa_95 = flt ssa_80, ssa_88.z
                vec1 1 ssa_96 = flt ssa_81, ssa_88.w
                vec1 32 ssa_97 = b2i32 ssa_95
                vec1 32 ssa_98 = ineg ssa_97
                vec1 32 ssa_99 = b2i32 ssa_96
                vec1 32 ssa_100 = ineg ssa_99
                vec1 1 ssa_101 = iand ssa_89, ssa_95
                vec1 32 ssa_102 = b2i32 ssa_101
                vec1 32 ssa_103 = ineg ssa_102
                vec1 32 ssa_104 = imov ssa_103
                vec1 32 ssa_105 = b2f32 ssa_90
                vec1 32 ssa_106 = imov ssa_105
                vec1 32 ssa_107 = b2f32 ssa_96
                vec1 32 ssa_108 = imov ssa_107
                vec1 1 ssa_109 = ine ssa_108, ssa_4

Which ends up as:

                vec2 32 ssa_71 = vec2 ssa_69, ssa_4
                vec4 32 ssa_72 = txf ssa_67 (texture_deref), ssa_71 (coord),
ssa_4 (lod), 0 (sampler), 
                vec1 32 ssa_73 = flt32 ssa_66, ssa_72.w
                vec1 32 ssa_74 = b2f32 ssa_73
                vec1 32 ssa_75 = ine32 ssa_74, ssa_4

With the offending opt commented out we end up with:

                vec2 32 ssa_76 = vec2 ssa_74, ssa_4
                vec4 32 ssa_77 = txf ssa_72 (texture_deref), ssa_76 (coord),
ssa_4 (lod), 0 (sampler), 
                vec1 32 ssa_78 = flt32 ssa_77.x, ssa_70
                vec1 32 ssa_79 = flt32 ssa_77.y, ssa_71
                vec1 32 ssa_80 = flt32 ssa_70, ssa_77.z
                vec1 32 ssa_81 = flt32 ssa_71, ssa_77.w
                vec1 32 ssa_82 = iand ssa_78, ssa_80
                vec1 32 ssa_83 = iand ssa_79, ssa_82
                vec1 32 ssa_84 = iand ssa_81, ssa_83

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