[Mesa-dev] [PATCH v2 04/53] compiler/spirv: implement 16-bit asin
Iago Toral Quiroga
itoral at igalia.com
Wed Dec 19 11:50:32 UTC 2018
v2:
- use nir_fmul_imm and nir_fadd_imm helpers (Jason)
---
src/compiler/spirv/vtn_glsl450.c | 23 ++++++++++++++---------
1 file changed, 14 insertions(+), 9 deletions(-)
diff --git a/src/compiler/spirv/vtn_glsl450.c b/src/compiler/spirv/vtn_glsl450.c
index b54aeb9b217..f411d17cfe4 100644
--- a/src/compiler/spirv/vtn_glsl450.c
+++ b/src/compiler/spirv/vtn_glsl450.c
@@ -202,17 +202,22 @@ build_log(nir_builder *b, nir_ssa_def *x)
static nir_ssa_def *
build_asin(nir_builder *b, nir_ssa_def *x, float p0, float p1)
{
+ nir_ssa_def *one = nir_imm_floatN_t(b, 1.0f, x->bit_size);
nir_ssa_def *abs_x = nir_fabs(b, x);
+
+ nir_ssa_def *p0_plus_xp1 = nir_fadd_imm(b, nir_fmul_imm(b, abs_x, p1), p0);
+
+ nir_ssa_def *expr_tail =
+ nir_fadd_imm(b, nir_fmul(b, abs_x,
+ nir_fadd_imm(b, nir_fmul(b, abs_x,
+ p0_plus_xp1),
+ M_PI_4f - 1.0f)),
+ M_PI_2f);
+
return nir_fmul(b, nir_fsign(b, x),
- nir_fsub(b, nir_imm_float(b, M_PI_2f),
- nir_fmul(b, nir_fsqrt(b, nir_fsub(b, nir_imm_float(b, 1.0f), abs_x)),
- nir_fadd(b, nir_imm_float(b, M_PI_2f),
- nir_fmul(b, abs_x,
- nir_fadd(b, nir_imm_float(b, M_PI_4f - 1.0f),
- nir_fmul(b, abs_x,
- nir_fadd(b, nir_imm_float(b, p0),
- nir_fmul(b, abs_x,
- nir_imm_float(b, p1))))))))));
+ nir_fsub(b, nir_imm_float(b, M_PI_2f),
+ nir_fmul(b, nir_fsqrt(b, nir_fsub(b, one, abs_x)),
+ expr_tail)));
}
/**
--
2.17.1
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