[Mesa-dev] [PATCH 8/7] radeonsi: move const_uploader allocations to 32-bit address space

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
---

Continuation of the 32-bit pointer series.

 src/gallium/drivers/radeon/r600_buffer_common.c | 3 +++
 src/gallium/drivers/radeon/r600_pipe_common.c   | 5 +++--
 src/gallium/drivers/radeon/r600_pipe_common.h   | 1 +
 3 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/radeon/r600_buffer_common.c b/src/gallium/drivers/radeon/r600_buffer_common.c
index aca536d..2d64eed 100644
--- a/src/gallium/drivers/radeon/r600_buffer_common.c
+++ b/src/gallium/drivers/radeon/r600_buffer_common.c
@@ -170,20 +170,23 @@ void si_init_resource_fields(struct si_screen *sscreen,
 		res->flags |= RADEON_FLAG_NO_SUBALLOC; /* shareable */
 	else
 		res->flags |= RADEON_FLAG_NO_INTERPROCESS_SHARING;
 
 	if (sscreen->debug_flags & DBG(NO_WC))
 		res->flags &= ~RADEON_FLAG_GTT_WC;
 
 	if (res->b.b.flags & R600_RESOURCE_FLAG_READ_ONLY)
 		res->flags |= RADEON_FLAG_READ_ONLY;
 
+	if (res->b.b.flags & R600_RESOURCE_FLAG_32BIT)
+		res->flags |= RADEON_FLAG_32BIT;
+
 	/* Set expected VRAM and GART usage for the buffer. */
 	res->vram_usage = 0;
 	res->gart_usage = 0;
 	res->max_forced_staging_uploads = 0;
 	res->b.max_forced_staging_uploads = 0;
 
 	if (res->domains & RADEON_DOMAIN_VRAM) {
 		res->vram_usage = size;
 
 		res->max_forced_staging_uploads =
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c
index 9e45a9f..d46cb64 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -445,22 +445,23 @@ bool si_common_context_init(struct r600_common_context *rctx,
 		return false;
 
 	rctx->b.stream_uploader = u_upload_create(&rctx->b, 1024 * 1024,
 						  0, PIPE_USAGE_STREAM,
 						  R600_RESOURCE_FLAG_READ_ONLY);
 	if (!rctx->b.stream_uploader)
 		return false;
 
 	rctx->b.const_uploader = u_upload_create(&rctx->b, 128 * 1024,
 						 0, PIPE_USAGE_DEFAULT,
-						 sscreen->cpdma_prefetch_writes_memory ?
-							0 : R600_RESOURCE_FLAG_READ_ONLY);
+						 R600_RESOURCE_FLAG_32BIT |
+						 (sscreen->cpdma_prefetch_writes_memory ?
+							0 : R600_RESOURCE_FLAG_READ_ONLY));
 	if (!rctx->b.const_uploader)
 		return false;
 
 	rctx->cached_gtt_allocator = u_upload_create(&rctx->b, 16 * 1024,
 						     0, PIPE_USAGE_STAGING, 0);
 	if (!rctx->cached_gtt_allocator)
 		return false;
 
 	rctx->ctx = rctx->ws->ctx_create(rctx->ws);
 	if (!rctx->ctx)
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index e2cd6c60..7941903 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -47,20 +47,21 @@
 struct u_log_context;
 struct si_screen;
 struct si_context;
 
 #define R600_RESOURCE_FLAG_TRANSFER		(PIPE_RESOURCE_FLAG_DRV_PRIV << 0)
 #define R600_RESOURCE_FLAG_FLUSHED_DEPTH	(PIPE_RESOURCE_FLAG_DRV_PRIV << 1)
 #define R600_RESOURCE_FLAG_FORCE_TILING		(PIPE_RESOURCE_FLAG_DRV_PRIV << 2)
 #define R600_RESOURCE_FLAG_DISABLE_DCC		(PIPE_RESOURCE_FLAG_DRV_PRIV << 3)
 #define R600_RESOURCE_FLAG_UNMAPPABLE		(PIPE_RESOURCE_FLAG_DRV_PRIV << 4)
 #define R600_RESOURCE_FLAG_READ_ONLY		(PIPE_RESOURCE_FLAG_DRV_PRIV << 5)
+#define R600_RESOURCE_FLAG_32BIT		(PIPE_RESOURCE_FLAG_DRV_PRIV << 6)
 
 /* Debug flags. */
 enum {
 	/* Shader logging options: */
 	DBG_VS = PIPE_SHADER_VERTEX,
 	DBG_PS = PIPE_SHADER_FRAGMENT,
 	DBG_GS = PIPE_SHADER_GEOMETRY,
 	DBG_TCS = PIPE_SHADER_TESS_CTRL,
 	DBG_TES = PIPE_SHADER_TESS_EVAL,
 	DBG_CS = PIPE_SHADER_COMPUTE,
-- 
2.7.4