[Mesa-dev] [PATCH 1/2] i965: Add copy param to brw_cache_new_bo

[Kenneth Graunke]

On Friday, February 2, 2018 5:07:00 PM PST Jordan Justen wrote:
> Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
> ---
>  src/mesa/drivers/dri/i965/brw_program_cache.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_program_cache.c b/src/mesa/drivers/dri/i965/brw_program_cache.c
> index 9266273b5da..f084f94f929 100644
> --- a/src/mesa/drivers/dri/i965/brw_program_cache.c
> +++ b/src/mesa/drivers/dri/i965/brw_program_cache.c
> @@ -213,7 +213,7 @@ brw_search_cache(struct brw_cache *cache,
>  }
>  
>  static void
> -brw_cache_new_bo(struct brw_cache *cache, uint32_t new_size)
> +brw_cache_new_bo(struct brw_cache *cache, uint32_t new_size, bool copy)
>  {
>     struct brw_context *brw = cache->brw;
>     struct brw_bo *new_bo;
> @@ -229,7 +229,7 @@ brw_cache_new_bo(struct brw_cache *cache, uint32_t new_size)
>                                         MAP_ASYNC | MAP_PERSISTENT);
>  
>     /* Copy any existing data that needs to be saved. */
> -   if (cache->next_offset != 0) {
> +   if (copy && cache->next_offset != 0) {
>  #ifdef USE_SSE41
>        if (!cache->bo->cache_coherent && cpu_has_sse4_1)
>           _mesa_streaming_load_memcpy(map, cache->map, cache->next_offset);
> @@ -286,7 +286,7 @@ brw_alloc_item_data(struct brw_cache *cache, uint32_t size)
>        while (cache->next_offset + size > new_size)
>           new_size *= 2;
>  
> -      brw_cache_new_bo(cache, new_size);
> +      brw_cache_new_bo(cache, new_size, true);
>     }
>  
>     offset = cache->next_offset;
> 

I don't think you need this new parameter...we can just arrange for
cache->next_offset to be reset to 0 before calling brw_cache_new_bo,
at which point it'll see there's nothing to copy, and skip it.
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