[Mesa-dev] [PATCH] r600/sb/cayman: fix indirect ubo access on cayman
Dave Airlie
airlied at gmail.com
Mon Feb 5 06:05:39 UTC 2018
From: Dave Airlie <airlied at redhat.com>
With sb enabled on cayman, this was overwriting the proper
cf index value with random ones if the dst gpr was 2 or 3,
only save the value for a MOVA instruction.
Fixes:
KHR-GL45.gpu_shader5.uniform_blocks_array_indexing
(on cayman with sb)
Signed-off-by: Dave Airlie <airlied at redhat.com>
---
src/gallium/drivers/r600/sb/sb_bc_parser.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/r600/sb/sb_bc_parser.cpp b/src/gallium/drivers/r600/sb/sb_bc_parser.cpp
index 970e4141d5..87035ee2a6 100644
--- a/src/gallium/drivers/r600/sb/sb_bc_parser.cpp
+++ b/src/gallium/drivers/r600/sb/sb_bc_parser.cpp
@@ -567,7 +567,7 @@ int bc_parser::prepare_alu_group(cf_node* cf, alu_group_node *g) {
n->src.push_back(get_cf_index_value(1));
}
- if ((n->bc.dst_gpr == CM_V_SQ_MOVA_DST_CF_IDX0 || n->bc.dst_gpr == CM_V_SQ_MOVA_DST_CF_IDX1) &&
+ if ((flags & AF_MOVA) && (n->bc.dst_gpr == CM_V_SQ_MOVA_DST_CF_IDX0 || n->bc.dst_gpr == CM_V_SQ_MOVA_DST_CF_IDX1) &&
ctx.is_cayman())
// Move CF_IDX value into tex instruction operands, scheduler will later re-emit setting of CF_IDX
save_set_cf_index(n->src[0], n->bc.dst_gpr == CM_V_SQ_MOVA_DST_CF_IDX1);
--
2.14.3
More information about the mesa-dev
mailing list