[Mesa-dev] [PATCH 2/8] amdgpu/drm:add uvd hevc enc support in amdgpu cs

[James Zhu]

Updated in [Mesa-dev] [PATCH v2 0/8] The 2nd version for UVD HEVC encode


On 2018-02-05 04:12 PM, Boyuan Zhang wrote:
>
>
> On 2018-02-05 12:16 PM, James Zhu wrote:
>> Signed-off-by: James Zhu <James.Zhu at amd.com>
>> ---
>>   src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 6 ++++++
>>   1 file changed, 6 insertions(+)
>>
>> diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c 
>> b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
>> index 1927a3a..6f305b7 100644
>> --- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
>> +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
>> @@ -376,6 +376,7 @@ static bool amdgpu_cs_has_user_fence(struct 
>> amdgpu_cs_context *cs)
>>   {
>>      return cs->ib[IB_MAIN].ip_type != AMDGPU_HW_IP_UVD &&
>>             cs->ib[IB_MAIN].ip_type != AMDGPU_HW_IP_VCE &&
>> +          cs->ib[IB_MAIN].ip_type != AMDGPU_HW_IP_UVD_ENC &&
>>             cs->ib[IB_MAIN].ip_type != AMDGPU_HW_IP_VCN_DEC &&
>>             cs->ib[IB_MAIN].ip_type != AMDGPU_HW_IP_VCN_ENC;
>>   }
>> @@ -818,6 +819,10 @@ static bool amdgpu_init_cs_context(struct 
>> amdgpu_cs_context *cs,
>>         cs->ib[IB_MAIN].ip_type = AMDGPU_HW_IP_UVD;
>>         break;
>>   +   case RING_UVD_ENC:
>> +       cs->ib[IB_MAIN].ip_type = AMDGPU_HW_IP_UVD_ENC;
>> +       break;
>> +
>
> Please follow previous indentation, use space instead of tab here.
>
> Also, the patch name might better be changed to winsys/amdgpu.
>
> With those fixed, this patch is
> Reviewed-by: Boyuan Zhang <boyuan.zhang at amd.com>
>
> Thanks,
> Boyuan
>
>
>>      case RING_VCE:
>>         cs->ib[IB_MAIN].ip_type = AMDGPU_HW_IP_VCE;
>>         break;
>> @@ -1533,6 +1538,7 @@ static int amdgpu_cs_flush(struct 
>> radeon_winsys_cs *rcs,
>>         ws->gfx_ib_size_counter += (rcs->prev_dw + rcs->current.cdw) 
>> * 4;
>>         break;
>>      case RING_UVD:
>> +   case RING_UVD_ENC:
>>         while (rcs->current.cdw & 15)
>>            radeon_emit(rcs, 0x80000000); /* type2 nop packet */
>>         break;
>