[Mesa-dev] [PATCH] r600: fix texture gather swizzling.

[Roland Scheidegger]

Am 08.02.2018 um 07:23 schrieb Dave Airlie:
> From: Dave Airlie <airlied at redhat.com>
> 
> This fixes:
> KHR-GL45.texture_gather.swizzle
> on cayman and redwood.
> ---
>  src/gallium/drivers/r600/r600_shader.c | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
> index 358fc4c33d..471d4fabbb 100644
> --- a/src/gallium/drivers/r600/r600_shader.c
> +++ b/src/gallium/drivers/r600/r600_shader.c
> @@ -7977,14 +7977,14 @@ static int tgsi_tex(struct r600_shader_ctx *ctx)
>  
>  		if (ctx->bc->chip_class == CAYMAN) {
>  		/* GATHER4 result order is different from TGSI TG4 */
Maybe move the comment to the else clause.
Reviewed-by: Roland Scheidegger <sroland at vmware.com>

> -			tex.dst_sel_x = (inst->Dst[0].Register.WriteMask & 2) ? 0 : 7;
> -			tex.dst_sel_y = (inst->Dst[0].Register.WriteMask & 4) ? 1 : 7;
> -			tex.dst_sel_z = (inst->Dst[0].Register.WriteMask & 1) ? 2 : 7;
> +			tex.dst_sel_x = (inst->Dst[0].Register.WriteMask & 1) ? 0 : 7;
> +			tex.dst_sel_y = (inst->Dst[0].Register.WriteMask & 2) ? 1 : 7;
> +			tex.dst_sel_z = (inst->Dst[0].Register.WriteMask & 4) ? 2 : 7;
>  			tex.dst_sel_w = (inst->Dst[0].Register.WriteMask & 8) ? 3 : 7;
>  		} else {
> -			tex.dst_sel_x = (inst->Dst[0].Register.WriteMask & 2) ? 1 : 7;
> -			tex.dst_sel_y = (inst->Dst[0].Register.WriteMask & 4) ? 2 : 7;
> -			tex.dst_sel_z = (inst->Dst[0].Register.WriteMask & 1) ? 0 : 7;
> +			tex.dst_sel_x = (inst->Dst[0].Register.WriteMask & 1) ? 1 : 7;
> +			tex.dst_sel_y = (inst->Dst[0].Register.WriteMask & 2) ? 2 : 7;
> +			tex.dst_sel_z = (inst->Dst[0].Register.WriteMask & 4) ? 0 : 7;
>  			tex.dst_sel_w = (inst->Dst[0].Register.WriteMask & 8) ? 3 : 7;
>  		}
>  	}
>