[Mesa-dev] [PATCH 00/16] Prepare to add Ice Lake (ICL) support
Anuj Phogat
anuj.phogat at gmail.com
Tue Feb 13 19:15:00 UTC 2018
This series prepares the driver to enable Ice Lake support
in i965 driver. It adds gen11.xml, wires up the build
infrastructure and make ICL specific changes suggested by
h/w documentation. This series carry about 50% of all
the changes required to enable Ice Lake. I (or someone else
in the team) will send out more patches later in another
series.
Anuj Phogat (16):
intel/genxml/icl: Add gen11.xml
intel/genxml/icl: Generate packing headers
intel/genxml/icl: Update genx_bits header
intel/isl/icl: Add the maximum surface size limit
intel/isl/icl: Build and use gen11 surface state emit functions
intel/icl: Do StateCacheInvalidation for indirect clear color
i965/icl: Don't set ResetGatewayTimer
i965/icl: Build and use gen11 functions for genxml state-upload and
blorp
i965/icl: Update the comment for maximum number of threads per PSD
i965/icl: Define and use icl mocs settings
i965/icl: Update the assert in brw_memory_barrier()
i965/icl: Update switch statements
i965/icl: Add assertions to check dispatch mode is SIMD8
i965/icl: Disable HiZ surface sampling
i965/icl: Enable float blend optimization and Wa3DStateMode
i965/icl: Add render target flush after uploading binding table
src/intel/Android.genxml.mk | 5 +
src/intel/Android.isl.mk | 20 +
src/intel/Makefile.isl.am | 4 +
src/intel/Makefile.sources | 10 +-
src/intel/blorp/blorp_genX_exec.h | 15 +-
src/intel/genxml/gen11.xml | 3788 ++++++++++++++++++++++
src/intel/genxml/genX_pack.h | 2 +
src/intel/genxml/gen_bits_header.py | 1 +
src/intel/genxml/gen_macros.h | 3 +
src/intel/genxml/meson.build | 1 +
src/intel/isl/isl.c | 9 +-
src/intel/isl/isl_priv.h | 3 +
src/intel/isl/meson.build | 2 +-
src/mesa/drivers/dri/i965/Android.mk | 24 +-
src/mesa/drivers/dri/i965/Makefile.am | 6 +-
src/mesa/drivers/dri/i965/Makefile.sources | 4 +
src/mesa/drivers/dri/i965/brw_binding_tables.c | 14 +
src/mesa/drivers/dri/i965/brw_blorp.c | 4 +
src/mesa/drivers/dri/i965/brw_blorp.h | 2 +
src/mesa/drivers/dri/i965/brw_formatquery.c | 1 +
src/mesa/drivers/dri/i965/brw_program.c | 2 +-
src/mesa/drivers/dri/i965/brw_state.h | 7 +
src/mesa/drivers/dri/i965/brw_state_upload.c | 6 +-
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 2 +
src/mesa/drivers/dri/i965/genX_state_upload.c | 20 +-
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 5 +-
src/mesa/drivers/dri/i965/intel_screen.c | 1 +
src/mesa/drivers/dri/i965/meson.build | 2 +-
28 files changed, 3941 insertions(+), 22 deletions(-)
create mode 100644 src/intel/genxml/gen11.xml
--
2.13.6
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